0b141b4a3f09b09c31782da81fd2fd118310bbb7
[openwrt/staging/blocktrron.git] /
1 From 022a254fafce88367914dfc8168fe687fc528cdb Mon Sep 17 00:00:00 2001
2 From: Daniel Golle <daniel@makrotopia.org>
3 Date: Wed, 24 Jan 2024 05:17:25 +0000
4 Subject: [PATCH 22/48] net: dsa: mt7530: fix 10M/100M speed on MT7988 switch
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Setup PMCR port register for actual speed and duplex on internally
10 connected PHYs of the MT7988 built-in switch. This fixes links with
11 speeds other than 1000M.
12
13 Fixes: 110c18bfed41 ("net: dsa: mt7530: introduce driver for MT7988 built-in switch")
14 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
15 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
16 Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com>
17 Link: https://lore.kernel.org/r/a5b04dfa8256d8302f402545a51ac4c626fdba25.1706071272.git.daniel@makrotopia.org
18 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
19 ---
20 drivers/net/dsa/mt7530.c | 3 +--
21 1 file changed, 1 insertion(+), 2 deletions(-)
22
23 --- a/drivers/net/dsa/mt7530.c
24 +++ b/drivers/net/dsa/mt7530.c
25 @@ -3072,8 +3072,7 @@ static void mt753x_phylink_mac_link_up(s
26 /* MT753x MAC works in 1G full duplex mode for all up-clocked
27 * variants.
28 */
29 - if (interface == PHY_INTERFACE_MODE_INTERNAL ||
30 - interface == PHY_INTERFACE_MODE_TRGMII ||
31 + if (interface == PHY_INTERFACE_MODE_TRGMII ||
32 (phy_interface_mode_is_8023z(interface))) {
33 speed = SPEED_1000;
34 duplex = DUPLEX_FULL;