152cb07fdfada600a80f5662e147b655e50a0584
[openwrt/staging/blocktrron.git] /
1 From 1aa1e2327b7997ad3b3ac62fcf3d19b8d588e2ee Mon Sep 17 00:00:00 2001
2 From: Annaliese McDermond <nh6z@nh6z.net>
3 Date: Thu, 21 Mar 2019 17:58:50 -0700
4 Subject: [PATCH 404/782] ASoC: tlv320aic32x4: Move aosr and dosr setting to
5 separate functions
6
7 commit fbafbf6517274a797e6e6508c18dd8dba5920c89 upstream.
8
9 Move these to separate helper functions. This looks cleaner and fits
10 better with the new clock setting in CCF.
11
12 Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
13 Signed-off-by: Mark Brown <broonie@kernel.org>
14 ---
15 sound/soc/codecs/tlv320aic32x4.c | 24 +++++++++++++++++-------
16 1 file changed, 17 insertions(+), 7 deletions(-)
17
18 --- a/sound/soc/codecs/tlv320aic32x4.c
19 +++ b/sound/soc/codecs/tlv320aic32x4.c
20 @@ -720,6 +720,20 @@ static int aic32x4_set_dai_fmt(struct sn
21 return 0;
22 }
23
24 +static int aic32x4_set_aosr(struct snd_soc_component *component, u8 aosr)
25 +{
26 + return snd_soc_component_write(component, AIC32X4_AOSR, aosr);
27 +}
28 +
29 +static int aic32x4_set_dosr(struct snd_soc_component *component, u16 dosr)
30 +{
31 + snd_soc_component_write(component, AIC32X4_DOSRMSB, dosr >> 8);
32 + snd_soc_component_write(component, AIC32X4_DOSRLSB,
33 + (dosr & 0xff));
34 +
35 + return 0;
36 +}
37 +
38 static int aic32x4_set_processing_blocks(struct snd_soc_component *component,
39 u8 r_block, u8 p_block)
40 {
41 @@ -765,14 +779,10 @@ static int aic32x4_setup_clocks(struct s
42 clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate);
43 clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate);
44
45 - aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block);
46 + aic32x4_set_aosr(component, aic32x4_divs[i].aosr);
47 + aic32x4_set_dosr(component, aic32x4_divs[i].dosr);
48
49 - /* DOSR MSB & LSB values */
50 - snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8);
51 - snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff));
52 -
53 - /* AOSR value */
54 - snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr);
55 + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block);
56
57 return 0;
58 }