git.openwrt.org Git - openwrt/staging/dangole.git/blob

   1 From e642e6844bd4e6da28efab377f1a94e0eb9a3532 Mon Sep 17 00:00:00 2001
   2 From: Kuldeep Singh <kuldeep.singh@nxp.com>
   3 Date: Fri, 3 Jan 2020 14:47:59 +0530
   4 Subject: [PATCH] LF-20-1 arm64: dts: ls1012ardb: Update qspi node dts
   5  properties
   6
   7 Update rx and tx bus-width to 1.
   8 Use compatibles as "jedec,spi-nor" to probe flash without displaying warning:
   9 found s25fs512s, expected m25p80
  10
  11 Remove property 'big-endian' as it is not used by new driver anymore.
  12 Also, update dtsi compatibles to use "fsl,ls1021a-qspi".
  13
  14 Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
  15 ---
  16  arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 8 ++++----
  17  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi    | 3 +--
  18  2 files changed, 5 insertions(+), 6 deletions(-)
  19
  20 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
  21 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
  22 @@ -88,15 +88,15 @@
  23
  24  &qspi {
  25         status = "okay";
  26 +
  27         qflash0: s25fs512s@0 {
  28 -               compatible = "spansion,m25p80";
  29 +               compatible = "jedec,spi-nor";
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 spi-max-frequency = <20000000>;
  33 -               m25p,fast-read;
  34                 reg = <0>;
  35 -               spi-rx-bus-width = <2>;
  36 -               spi-tx-bus-width = <2>;
  37 +               spi-rx-bus-width = <1>;
  38 +               spi-tx-bus-width = <1>;
  39         };
  40
  41  };
  42 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
  43 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
  44 @@ -385,7 +385,7 @@
  45                 };
  46
  47                 qspi: spi@1550000 {
  48 -                       compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
  49 +                       compatible = "fsl,ls1021a-qspi";
  50                         #address-cells = <1>;
  51                         #size-cells = <0>;
  52                         reg = <0x0 0x1550000 0x0 0x10000>,
  53 @@ -394,7 +394,6 @@
  54                         interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
  55                         clock-names = "qspi_en", "qspi";
  56                         clocks = <&clockgen 4 0>, <&clockgen 4 0>;
  57 -                       big-endian;
  58                         status = "disabled";
  59                 };
  60