git.openwrt.org Git - openwrt/staging/jow.git/blob

   1 From 9ef77fbedad9ea8895cd5d7fb7aee16071f527dc Mon Sep 17 00:00:00 2001
   2 From: Wright Feng <Wright.Feng@cypress.com>
   3 Date: Fri, 26 Apr 2019 03:12:32 +0000
   4 Subject: [PATCH] brcmfmac: send mailbox interrupt twice for specific hardware
   5  device
   6
   7 For PCIE wireless device with core revision less than 14, device may miss
   8 PCIE to System Backplane Interrupt via PCIEtoSBMailbox. So add sending
   9 mail box interrupt twice as a hardware workaround.
  10
  11 Signed-off-by: Wright Feng <wright.feng@cypress.com>
  12 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  13 ---
  14  drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c | 7 ++++++-
  15  1 file changed, 6 insertions(+), 1 deletion(-)
  16
  17 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  18 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
  19 @@ -675,6 +675,7 @@ static int
  20  brcmf_pcie_send_mb_data(struct brcmf_pciedev_info *devinfo, u32 htod_mb_data)
  21  {
  22         struct brcmf_pcie_shared_info *shared;
  23 +       struct brcmf_core *core;
  24         u32 addr;
  25         u32 cur_htod_mb_data;
  26         u32 i;
  27 @@ -698,7 +699,11 @@ brcmf_pcie_send_mb_data(struct brcmf_pci
  28
  29         brcmf_pcie_write_tcm32(devinfo, addr, htod_mb_data);
  30         pci_write_config_dword(devinfo->pdev, BRCMF_PCIE_REG_SBMBX, 1);
  31 -       pci_write_config_dword(devinfo->pdev, BRCMF_PCIE_REG_SBMBX, 1);
  32 +
  33 +       /* Send mailbox interrupt twice as a hardware workaround */
  34 +       core = brcmf_chip_get_core(devinfo->ci, BCMA_CORE_PCIE2);
  35 +       if (core->rev <= 13)
  36 +               pci_write_config_dword(devinfo->pdev, BRCMF_PCIE_REG_SBMBX, 1);
  37
  38         return 0;
  39  }