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1 From patchwork Thu Sep 28 12:58:33 2017
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5 Subject: [v2,
6 2/7] PCI: aardvark: set PIO_ADDR_LS correctly in advk_pcie_rd_conf()
7 X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 X-Patchwork-Id: 819589
9 Message-Id: <20170928125838.11887-3-thomas.petazzoni@free-electrons.com>
10 To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org
11 Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
12 Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement
13 <gregory.clement@free-electrons.com>,
14 Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>,
15 Yehuda Yitschak <yehuday@marvell.com>,
16 linux-arm-kernel@lists.infradead.org, Antoine Tenart
17 <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?=
18 <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>,
19 stable@vger.kernel.org, Thomas Petazzoni
20 <thomas.petazzoni@free-electrons.com>
21 Date: Thu, 28 Sep 2017 14:58:33 +0200
22 From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
23 List-Id: <linux-pci.vger.kernel.org>
24
25 From: Victor Gu <xigu@marvell.com>
26
27 When setting the PIO_ADDR_LS register during a configuration read, we
28 were properly passing the device number, function number and register
29 number, but not the bus number, causing issues when reading the
30 configuration of PCIe devices.
31
32 Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
33 Cc: <stable@vger.kernel.org>
34 Signed-off-by: Victor Gu <xigu@marvell.com>
35 Reviewed-by: Wilson Ding <dingwei@marvell.com>
36 Reviewed-by: Nadav Haklai <nadavh@marvell.com>
37 [Thomas: tweak commit log.]
38 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
39 ---
40 drivers/pci/host/pci-aardvark.c | 2 +-
41 1 file changed, 1 insertion(+), 1 deletion(-)
42
43 --- a/drivers/pci/host/pci-aardvark.c
44 +++ b/drivers/pci/host/pci-aardvark.c
45 @@ -459,7 +459,7 @@ static int advk_pcie_rd_conf(struct pci_
46 advk_writel(pcie, reg, PIO_CTRL);
47
48 /* Program the address registers */
49 - reg = PCIE_BDF(devfn) | PCIE_CONF_REG(where);
50 + reg = PCIE_CONF_ADDR(bus->number, devfn, where);
51 advk_writel(pcie, reg, PIO_ADDR_LS);
52 advk_writel(pcie, 0, PIO_ADDR_MS);
53