git.openwrt.org Git - openwrt/staging/nbd.git/blob

   1 From eb836a6a299322a8e2b9627cccd23c7a76d068ba Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Fri, 8 Nov 2024 17:36:13 +0000
   4 Subject: [PATCH 1425/1482] rp1: clk: Rationalise the use of the
   5  CLK_IS_CRITICAL flag
   6
   7 The clock setup had been copied from clk-bcm2835 which had to cope
   8 with the firmware having configured clocks, so there were flags
   9 of CLK_IS_CRITICAL and CLK_IGNORE_UNUSED dotted around.
  10
  11 That isn't the situation with RP1 where only the main PLLs, CLK_SYS,
  12 and CLK_SLOW_SYS are critical, so update the configuration to match.
  13
  14 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  15 ---
  16  drivers/clk/clk-rp1.c | 41 ++++++-----------------------------------
  17  1 file changed, 6 insertions(+), 35 deletions(-)
  18
  19 --- a/drivers/clk/clk-rp1.c
  20 +++ b/drivers/clk/clk-rp1.c
  21 @@ -1504,8 +1504,6 @@ static const struct clk_ops rp1_varsrc_o
  22         .round_rate = rp1_varsrc_round_rate,
  23  };
  24
  25 -static bool rp1_clk_is_claimed(const char *name);
  26 -
  27  static struct clk_hw *rp1_register_pll_core(struct rp1_clockman *clockman,
  28                                             const void *data)
  29  {
  30 @@ -1521,7 +1519,7 @@ static struct clk_hw *rp1_register_pll_c
  31         init.num_parents = 1;
  32         init.name = pll_core_data->name;
  33         init.ops = &rp1_pll_core_ops;
  34 -       init.flags = pll_core_data->flags | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL;
  35 +       init.flags = pll_core_data->flags | CLK_IS_CRITICAL;
  36
  37         pll_core = kzalloc(sizeof(*pll_core), GFP_KERNEL);
  38         if (!pll_core)
  39 @@ -1554,7 +1552,7 @@ static struct clk_hw *rp1_register_pll(s
  40         init.num_parents = 1;
  41         init.name = pll_data->name;
  42         init.ops = &rp1_pll_ops;
  43 -       init.flags = pll_data->flags | CLK_IGNORE_UNUSED | CLK_IS_CRITICAL;
  44 +       init.flags = pll_data->flags | CLK_IGNORE_UNUSED;
  45
  46         pll = kzalloc(sizeof(*pll), GFP_KERNEL);
  47         if (!pll)
  48 @@ -1635,11 +1633,6 @@ static struct clk_hw *rp1_register_pll_d
  49         divider->div.hw.init = &init;
  50         divider->div.table = pll_sec_div_table;
  51
  52 -       if (!rp1_clk_is_claimed(divider_data->source_pll))
  53 -               init.flags |= CLK_IS_CRITICAL;
  54 -       if (!rp1_clk_is_claimed(divider_data->name))
  55 -               divider->div.flags |= CLK_IS_CRITICAL;
  56 -
  57         divider->clockman = clockman;
  58         divider->data = divider_data;
  59
  60 @@ -1861,6 +1854,8 @@ static const struct rp1_clk_desc clk_des
  61                                 .max_freq = 200 * MHz,
  62                                 .fc0_src = FC_NUM(0, 4),
  63                                 .clk_src_mask = 0x3,
  64 +                               /* Always enabled in hardware */
  65 +                               .flags = CLK_IS_CRITICAL,
  66                                 ),
  67
  68         [RP1_CLK_SLOW_SYS] = REGISTER_CLK(
  69 @@ -1875,6 +1870,8 @@ static const struct rp1_clk_desc clk_des
  70                                 .max_freq = 50 * MHz,
  71                                 .fc0_src = FC_NUM(1, 4),
  72                                 .clk_src_mask = 0x1,
  73 +                               /* Always enabled in hardware */
  74 +                               .flags = CLK_IS_CRITICAL,
  75                                 ),
  76
  77         [RP1_CLK_UART] = REGISTER_CLK(
  78 @@ -2394,24 +2391,6 @@ static const struct rp1_clk_desc clk_des
  79         [RP1_CLK_MIPI1_DSI_BYTECLOCK] = REGISTER_VARSRC("clksrc_mipi1_dsi_byteclk"),
  80  };
  81
  82 -static bool rp1_clk_claimed[ARRAY_SIZE(clk_desc_array)];
  83 -
  84 -static bool rp1_clk_is_claimed(const char *name)
  85 -{
  86 -       unsigned int i;
  87 -
  88 -       for (i = 0; i < ARRAY_SIZE(clk_desc_array); i++) {
  89 -               if (clk_desc_array[i].data) {
  90 -                       const char *clk_name = *(const char **)(clk_desc_array[i].data);
  91 -
  92 -                       if (!strcmp(name, clk_name))
  93 -                               return rp1_clk_claimed[i];
  94 -               }
  95 -       }
  96 -
  97 -       return false;
  98 -}
  99 -
 100  static int rp1_clk_probe(struct platform_device *pdev)
 101  {
 102         const struct rp1_clk_desc *desc;
 103 @@ -2422,7 +2401,6 @@ static int rp1_clk_probe(struct platform
 104         const size_t asize = ARRAY_SIZE(clk_desc_array);
 105         u32 chip_id, platform;
 106         unsigned int i;
 107 -       u32 clk_id;
 108         int ret;
 109
 110         clockman = devm_kzalloc(dev, struct_size(clockman, onecell.hws, asize),
 111 @@ -2439,13 +2417,6 @@ static int rp1_clk_probe(struct platform
 112         if (IS_ERR(clockman->regs))
 113                 return PTR_ERR(clockman->regs);
 114
 115 -       memset(rp1_clk_claimed, 0, sizeof(rp1_clk_claimed));
 116 -       for (i = 0;
 117 -            !of_property_read_u32_index(pdev->dev.of_node, "claim-clocks",
 118 -                                        i, &clk_id);
 119 -            i++)
 120 -               rp1_clk_claimed[clk_id] = true;
 121 -
 122         platform_set_drvdata(pdev, clockman);
 123
 124         clockman->onecell.num = asize;