285c6f6a7b3aa04e3a68663011803329ec85a7a5
[openwrt/staging/blocktrron.git] /
1 From c4eff784465f88218dc5eb51320320464db83d3f Mon Sep 17 00:00:00 2001
2 From: Fabien Parent <fparent@baylibre.com>
3 Date: Fri, 27 Jan 2023 16:44:44 +0100
4 Subject: [PATCH 12/42] thermal/drivers/mediatek: Add support for MT8365 SoC
5
6 MT8365 is similar to the other SoCs supported by the driver. It has only
7 one bank and 3 actual sensors that can be multiplexed. There is another
8 one sensor that does not have usable data.
9
10 Signed-off-by: Fabien Parent <fparent@baylibre.com>
11 Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
12 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
13 Link: https://lore.kernel.org/r/20221018-up-i350-thermal-bringup-v9-3-55a1ae14af74@baylibre.com
14 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
15 ---
16 drivers/thermal/mediatek/auxadc_thermal.c | 68 +++++++++++++++++++++++
17 1 file changed, 68 insertions(+)
18
19 --- a/drivers/thermal/mediatek/auxadc_thermal.c
20 +++ b/drivers/thermal/mediatek/auxadc_thermal.c
21 @@ -31,6 +31,7 @@
22 #define AUXADC_CON2_V 0x010
23 #define AUXADC_DATA(channel) (0x14 + (channel) * 4)
24
25 +#define APMIXED_SYS_TS_CON0 0x600
26 #define APMIXED_SYS_TS_CON1 0x604
27
28 /* Thermal Controller Registers */
29 @@ -281,6 +282,17 @@ enum mtk_thermal_version {
30 /* The calibration coefficient of sensor */
31 #define MT7986_CALIBRATION 165
32
33 +/* MT8365 */
34 +#define MT8365_TEMP_AUXADC_CHANNEL 11
35 +#define MT8365_CALIBRATION 164
36 +#define MT8365_NUM_CONTROLLER 1
37 +#define MT8365_NUM_BANKS 1
38 +#define MT8365_NUM_SENSORS 3
39 +#define MT8365_NUM_SENSORS_PER_ZONE 3
40 +#define MT8365_TS1 0
41 +#define MT8365_TS2 1
42 +#define MT8365_TS3 2
43 +
44 struct mtk_thermal;
45
46 struct thermal_bank_cfg {
47 @@ -435,6 +447,24 @@ static const int mt7986_mux_values[MT798
48 static const int mt7986_vts_index[MT7986_NUM_SENSORS] = { VTS1 };
49 static const int mt7986_tc_offset[MT7986_NUM_CONTROLLER] = { 0x0, };
50
51 +/* MT8365 thermal sensor data */
52 +static const int mt8365_bank_data[MT8365_NUM_SENSORS] = {
53 + MT8365_TS1, MT8365_TS2, MT8365_TS3
54 +};
55 +
56 +static const int mt8365_msr[MT8365_NUM_SENSORS_PER_ZONE] = {
57 + TEMP_MSR0, TEMP_MSR1, TEMP_MSR2
58 +};
59 +
60 +static const int mt8365_adcpnp[MT8365_NUM_SENSORS_PER_ZONE] = {
61 + TEMP_ADCPNP0, TEMP_ADCPNP1, TEMP_ADCPNP2
62 +};
63 +
64 +static const int mt8365_mux_values[MT8365_NUM_SENSORS] = { 0, 1, 2 };
65 +static const int mt8365_tc_offset[MT8365_NUM_CONTROLLER] = { 0 };
66 +
67 +static const int mt8365_vts_index[MT8365_NUM_SENSORS] = { VTS1, VTS2, VTS3 };
68 +
69 /*
70 * The MT8173 thermal controller has four banks. Each bank can read up to
71 * four temperature sensors simultaneously. The MT8173 has a total of 5
72 @@ -510,6 +540,40 @@ static const struct mtk_thermal_data mt2
73 };
74
75 /*
76 + * The MT8365 thermal controller has one bank, which can read up to
77 + * four temperature sensors simultaneously. The MT8365 has a total of 3
78 + * temperature sensors.
79 + *
80 + * The thermal core only gets the maximum temperature of this one bank,
81 + * so the bank concept wouldn't be necessary here. However, the SVS (Smart
82 + * Voltage Scaling) unit makes its decisions based on the same bank
83 + * data.
84 + */
85 +static const struct mtk_thermal_data mt8365_thermal_data = {
86 + .auxadc_channel = MT8365_TEMP_AUXADC_CHANNEL,
87 + .num_banks = MT8365_NUM_BANKS,
88 + .num_sensors = MT8365_NUM_SENSORS,
89 + .vts_index = mt8365_vts_index,
90 + .cali_val = MT8365_CALIBRATION,
91 + .num_controller = MT8365_NUM_CONTROLLER,
92 + .controller_offset = mt8365_tc_offset,
93 + .need_switch_bank = false,
94 + .bank_data = {
95 + {
96 + .num_sensors = MT8365_NUM_SENSORS,
97 + .sensors = mt8365_bank_data
98 + },
99 + },
100 + .msr = mt8365_msr,
101 + .adcpnp = mt8365_adcpnp,
102 + .sensor_mux_values = mt8365_mux_values,
103 + .version = MTK_THERMAL_V1,
104 + .apmixed_buffer_ctl_reg = APMIXED_SYS_TS_CON0,
105 + .apmixed_buffer_ctl_mask = (u32) ~GENMASK(29, 28),
106 + .apmixed_buffer_ctl_set = 0,
107 +};
108 +
109 +/*
110 * The MT2712 thermal controller has one bank, which can read up to
111 * four temperature sensors simultaneously. The MT2712 has a total of 4
112 * temperature sensors.
113 @@ -1080,6 +1144,10 @@ static const struct of_device_id mtk_the
114 {
115 .compatible = "mediatek,mt8183-thermal",
116 .data = (void *)&mt8183_thermal_data,
117 + },
118 + {
119 + .compatible = "mediatek,mt8365-thermal",
120 + .data = (void *)&mt8365_thermal_data,
121 }, {
122 },
123 };