git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Sun, 16 Jul 2017 12:31:44 +0200
   4 Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
   5
   6 Add a lookup as "refclk" to describe its function for the uarts.
   7
   8 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
   9 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  10 ---
  11  arch/mips/bcm63xx/clk.c | 13 +++++++++++++
  12  1 file changed, 13 insertions(+)
  13
  14 --- a/arch/mips/bcm63xx/clk.c
  15 +++ b/arch/mips/bcm63xx/clk.c
  16 @@ -356,6 +356,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
  17  static struct clk_lookup bcm3368_clks[] = {
  18         /* fixed rate clocks */
  19         CLKDEV_INIT(NULL, "periph", &clk_periph),
  20 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  21 +       CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  22         /* gated clocks */
  23         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  24         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  25 @@ -369,6 +371,8 @@ static struct clk_lookup bcm3368_clks[]
  26  static struct clk_lookup bcm6328_clks[] = {
  27         /* fixed rate clocks */
  28         CLKDEV_INIT(NULL, "periph", &clk_periph),
  29 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  30 +       CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  31         /* gated clocks */
  32         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  33         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  34 @@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[]
  35  static struct clk_lookup bcm6338_clks[] = {
  36         /* fixed rate clocks */
  37         CLKDEV_INIT(NULL, "periph", &clk_periph),
  38 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  39         /* gated clocks */
  40         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  41         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  42 @@ -392,6 +397,7 @@ static struct clk_lookup bcm6338_clks[]
  43  static struct clk_lookup bcm6345_clks[] = {
  44         /* fixed rate clocks */
  45         CLKDEV_INIT(NULL, "periph", &clk_periph),
  46 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  47         /* gated clocks */
  48         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  49         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  50 @@ -404,6 +410,7 @@ static struct clk_lookup bcm6345_clks[]
  51  static struct clk_lookup bcm6348_clks[] = {
  52         /* fixed rate clocks */
  53         CLKDEV_INIT(NULL, "periph", &clk_periph),
  54 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  55         /* gated clocks */
  56         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  57         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  58 @@ -416,6 +423,8 @@ static struct clk_lookup bcm6348_clks[]
  59  static struct clk_lookup bcm6358_clks[] = {
  60         /* fixed rate clocks */
  61         CLKDEV_INIT(NULL, "periph", &clk_periph),
  62 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  63 +       CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  64         /* gated clocks */
  65         CLKDEV_INIT(NULL, "enet0", &clk_enet0),
  66         CLKDEV_INIT(NULL, "enet1", &clk_enet1),
  67 @@ -429,6 +438,8 @@ static struct clk_lookup bcm6358_clks[]
  68  static struct clk_lookup bcm6362_clks[] = {
  69         /* fixed rate clocks */
  70         CLKDEV_INIT(NULL, "periph", &clk_periph),
  71 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  72 +       CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  73         /* gated clocks */
  74         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  75         CLKDEV_INIT(NULL, "usbh", &clk_usbh),
  76 @@ -442,6 +453,8 @@ static struct clk_lookup bcm6362_clks[]
  77  static struct clk_lookup bcm6368_clks[] = {
  78         /* fixed rate clocks */
  79         CLKDEV_INIT(NULL, "periph", &clk_periph),
  80 +       CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
  81 +       CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
  82         /* gated clocks */
  83         CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
  84         CLKDEV_INIT(NULL, "usbh", &clk_usbh),