33b6ace7aebee6f67dc865f948342be09586d0d6
[openwrt/staging/jow.git] /
1 From 153c92ec4e0364c12f99e39106dc79e5b7167cac Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Wed, 30 Dec 2020 14:51:29 +0000
4 Subject: [PATCH] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and
5 DMA_WIDE_DEST flags
6
7 Use (reserved) bits 24 and 25 of the dreq value
8 (the second cell of the DT DMA descriptor) to request
9 that wide source reads or wide dest writes are required
10
11 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
12 ---
13 drivers/dma/bcm2835-dma.c | 19 ++++++++++++++++---
14 1 file changed, 16 insertions(+), 3 deletions(-)
15
16 --- a/drivers/dma/bcm2835-dma.c
17 +++ b/drivers/dma/bcm2835-dma.c
18 @@ -171,6 +171,17 @@ struct bcm2835_desc {
19 #define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \
20 0 : BCM2835_DMA_WAIT_RESP)
21
22 +/* A fake bit to request that the driver requires wide reads */
23 +#define BCM2835_DMA_WIDE_SOURCE BIT(24)
24 +#define WIDE_SOURCE(x) ((x & BCM2835_DMA_WIDE_SOURCE) ? \
25 + BCM2835_DMA_S_WIDTH : 0)
26 +
27 +/* A fake bit to request that the driver requires wide writes */
28 +#define BCM2835_DMA_WIDE_DEST BIT(25)
29 +#define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \
30 + BCM2835_DMA_D_WIDTH : 0)
31 +
32 +
33 /* debug register bits */
34 #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
35 #define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
36 @@ -850,7 +861,8 @@ static struct dma_async_tx_descriptor *b
37 {
38 struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
39 struct bcm2835_desc *d;
40 - u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
41 + u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
42 + WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
43 u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq);
44 size_t max_len = bcm2835_dma_max_frame_length(c);
45 size_t frames;
46 @@ -881,7 +893,8 @@ static struct dma_async_tx_descriptor *b
47 struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
48 struct bcm2835_desc *d;
49 dma_addr_t src = 0, dst = 0;
50 - u32 info = WAIT_RESP(c->dreq);
51 + u32 info = WAIT_RESP(c->dreq) |
52 + WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
53 u32 extra = BCM2835_DMA_INT_EN;
54 size_t frames;
55
56 @@ -943,7 +956,7 @@ static struct dma_async_tx_descriptor *b
57 struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
58 struct bcm2835_desc *d;
59 dma_addr_t src, dst;
60 - u32 info = WAIT_RESP(c->dreq);
61 + u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
62 u32 extra = 0;
63 size_t max_len = bcm2835_dma_max_frame_length(c);
64 size_t frames;