git.openwrt.org Git - openwrt/staging/pepe2k.git/blob

   1 From fc20eb4e650bf793bd6b3d804a63b67085c55f08 Mon Sep 17 00:00:00 2001
   2 From: Jonathan Bell <jonathan@raspberrypi.com>
   3 Date: Fri, 22 Mar 2024 14:22:55 +0000
   4 Subject: [PATCH 0988/1085] drivers: sdhci-brcmstb: work around mystery CQE
   5  CMD_IDLE_TIMER trampling
   6
   7 For unknown reasons the controller seems to reset the idle polling timer
   8 interval on CQE enable/disable to 8 clocks which is extremely short.
   9
  10 Just use the reset value in the eMMC spec (4096 clock periods which at
  11 200MHz is ~20uS).
  12
  13 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  14 ---
  15  drivers/mmc/host/sdhci-brcmstb.c | 4 ++++
  16  1 file changed, 4 insertions(+)
  17
  18 --- a/drivers/mmc/host/sdhci-brcmstb.c
  19 +++ b/drivers/mmc/host/sdhci-brcmstb.c
  20 @@ -338,6 +338,7 @@ static void sdhci_brcmstb_dumpregs(struc
  21  static void sdhci_brcmstb_cqe_enable(struct mmc_host *mmc)
  22  {
  23         struct sdhci_host *host = mmc_priv(mmc);
  24 +       struct cqhci_host *cq_host = mmc->cqe_private;
  25         u32 reg;
  26
  27         reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
  28 @@ -347,6 +348,9 @@ static void sdhci_brcmstb_cqe_enable(str
  29         }
  30
  31         sdhci_cqe_enable(mmc);
  32 +
  33 +       /* Reset CMD13 polling timer back to eMMC specification default */
  34 +       cqhci_writel(cq_host, 0x00011000, CQHCI_SSC1);
  35  }
  36
  37  static const struct cqhci_host_ops sdhci_brcmstb_cqhci_ops = {