1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Thu, 23 Mar 2023 21:45:43 +0100
3 Subject: [PATCH] net: ethernet: mediatek: fix ppe flow accounting for v1
6 Older chips (like MT7622) use a different bit in ib2 to enable hardware
9 Signed-off-by: Felix Fietkau <nbd@nbd.name>
12 --- a/drivers/net/ethernet/mediatek/mtk_ppe.c
13 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
14 @@ -605,6 +605,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
15 struct mtk_eth *eth = ppe->eth;
16 u16 timestamp = mtk_eth_timestamp(eth);
17 struct mtk_foe_entry *hwe;
20 if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
21 entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2;
22 @@ -621,8 +622,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p
24 hwe->ib1 = entry->ib1;
26 - if (ppe->accounting)
27 - *mtk_foe_entry_ib2(eth, hwe) |= MTK_FOE_IB2_MIB_CNT;
28 + if (ppe->accounting) {
29 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
30 + val = MTK_FOE_IB2_MIB_CNT_V2;
32 + val = MTK_FOE_IB2_MIB_CNT;
33 + *mtk_foe_entry_ib2(eth, hwe) |= val;
38 --- a/drivers/net/ethernet/mediatek/mtk_ppe.h
39 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
40 @@ -55,9 +55,10 @@ enum {
41 #define MTK_FOE_IB2_PSE_QOS BIT(4)
42 #define MTK_FOE_IB2_DEST_PORT GENMASK(7, 5)
43 #define MTK_FOE_IB2_MULTICAST BIT(8)
44 +#define MTK_FOE_IB2_MIB_CNT BIT(10)
46 #define MTK_FOE_IB2_WDMA_QID2 GENMASK(13, 12)
47 -#define MTK_FOE_IB2_MIB_CNT BIT(15)
48 +#define MTK_FOE_IB2_MIB_CNT_V2 BIT(15)
49 #define MTK_FOE_IB2_WDMA_DEVIDX BIT(16)
50 #define MTK_FOE_IB2_WDMA_WINFO BIT(17)