3d7af17b16a727d5869a5b8f65c0a0fad5cf4760
[openwrt/staging/blocktrron.git] /
1 From patchwork Sat Sep 17 20:29:26 2022
2 Content-Type: text/plain; charset="utf-8"
3 MIME-Version: 1.0
4 Content-Transfer-Encoding: 7bit
5 X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
6 X-Patchwork-Id: 12979254
7 X-Patchwork-Delegate: kvalo@adurom.com
8 Return-Path: <linux-wireless-owner@kernel.org>
9 Date: Sat, 17 Sep 2022 21:29:26 +0100
10 From: Daniel Golle <daniel@makrotopia.org>
11 To: linux-wireless@vger.kernel.org, Stanislaw Gruszka <stf_xl@wp.pl>,
12 Helmut Schaa <helmut.schaa@googlemail.com>
13 Cc: Kalle Valo <kvalo@kernel.org>,
14 "David S. Miller" <davem@davemloft.net>,
15 Eric Dumazet <edumazet@google.com>,
16 Jakub Kicinski <kuba@kernel.org>,
17 Paolo Abeni <pabeni@redhat.com>,
18 Johannes Berg <johannes.berg@intel.com>
19 Subject: [PATCH v3 13/16] rt2x00: set correct TX_SW_CFG1 MAC register for
20 MT7620
21 Message-ID:
22 <4be38975ce600a34249e12d09a3cb758c6e71071.1663445157.git.daniel@makrotopia.org>
23 References: <cover.1663445157.git.daniel@makrotopia.org>
24 MIME-Version: 1.0
25 Content-Disposition: inline
26 In-Reply-To: <cover.1663445157.git.daniel@makrotopia.org>
27 Precedence: bulk
28 List-ID: <linux-wireless.vger.kernel.org>
29 X-Mailing-List: linux-wireless@vger.kernel.org
30
31 Set correct TX_SW_CFG1 MAC register as it is done also in v3 of the
32 vendor driver[1].
33
34 [1]: https://gitlab.com/dm38/padavan-ng/-/blob/master/trunk/proprietary/rt_wifi/rtpci/3.0.X.X/mt76x2/chips/rt6352.c#L531
35 Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
36 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
37 Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
38 ---
39 drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 2 +-
40 1 file changed, 1 insertion(+), 1 deletion(-)
41
42 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
43 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
44 @@ -5966,7 +5966,7 @@ static int rt2800_init_registers(struct
45 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
46 } else if (rt2x00_rt(rt2x00dev, RT6352)) {
47 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
48 - rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0000);
49 + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
50 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
51 rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
52 rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);