git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 898d0d6483a9360f1968e0a900465c1fa152a4a9 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Sat, 30 Apr 2022 07:44:58 +0200
   4 Subject: [PATCH 3/3] clk: qcom: clk-krait: add apq/ipq8064 errata workaround
   5
   6 Add apq/ipq8064 errata workaround where the sec_src clock gating needs to
   7 be disabled during switching. krait-cc compatible is not enough to
   8 handle this and limit this workaround to apq/ipq8064. We check machine
   9 compatible to handle this.
  10
  11 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  12 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  13 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  14 Link: https://lore.kernel.org/r/20220430054458.31321-4-ansuelsmth@gmail.com
  15 ---
  16  drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
  17  drivers/clk/qcom/clk-krait.h |  1 +
  18  drivers/clk/qcom/krait-cc.c  |  8 ++++++++
  19  3 files changed, 25 insertions(+)
  20
  21 --- a/drivers/clk/qcom/clk-krait.c
  22 +++ b/drivers/clk/qcom/clk-krait.c
  23 @@ -18,13 +18,23 @@
  24  static DEFINE_SPINLOCK(krait_clock_reg_lock);
  25
  26  #define LPL_SHIFT      8
  27 +#define SECCLKAGD      BIT(4)
  28 +
  29  static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
  30  {
  31         unsigned long flags;
  32         u32 regval;
  33
  34         spin_lock_irqsave(&krait_clock_reg_lock, flags);
  35 +
  36         regval = krait_get_l2_indirect_reg(mux->offset);
  37 +
  38 +       /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */
  39 +       if (mux->disable_sec_src_gating) {
  40 +               regval |= SECCLKAGD;
  41 +               krait_set_l2_indirect_reg(mux->offset, regval);
  42 +       }
  43 +
  44         regval &= ~(mux->mask << mux->shift);
  45         regval |= (sel & mux->mask) << mux->shift;
  46         if (mux->lpl) {
  47 @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct k
  48         }
  49         krait_set_l2_indirect_reg(mux->offset, regval);
  50
  51 +       /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */
  52 +       if (mux->disable_sec_src_gating) {
  53 +               regval &= ~SECCLKAGD;
  54 +               krait_set_l2_indirect_reg(mux->offset, regval);
  55 +       }
  56 +
  57         /* Wait for switch to complete. */
  58         mb();
  59         udelay(1);
  60 --- a/drivers/clk/qcom/clk-krait.h
  61 +++ b/drivers/clk/qcom/clk-krait.h
  62 @@ -15,6 +15,7 @@ struct krait_mux_clk {
  63         u8              safe_sel;
  64         u8              old_index;
  65         bool            reparent;
  66 +       bool            disable_sec_src_gating;
  67
  68         struct clk_hw   hw;
  69         struct notifier_block   clk_nb;
  70 --- a/drivers/clk/qcom/krait-cc.c
  71 +++ b/drivers/clk/qcom/krait-cc.c
  72 @@ -139,6 +139,14 @@ krait_add_sec_mux(struct device *dev, in
  73         mux->hw.init = &init;
  74         mux->safe_sel = 0;
  75
  76 +       /* Checking for qcom,krait-cc-v1 or qcom,krait-cc-v2 is not
  77 +        * enough to limit this to apq/ipq8064. Directly check machine
  78 +        * compatible to correctly handle this errata.
  79 +        */
  80 +       if (of_machine_is_compatible("qcom,ipq8064") ||
  81 +           of_machine_is_compatible("qcom,apq8064"))
  82 +               mux->disable_sec_src_gating = true;
  83 +
  84         init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
  85         if (!init.name)
  86                 return -ENOMEM;