git.openwrt.org Git - openwrt/staging/blogic.git/blob

   1 From dec7ec15a9c2f2c3e0a09bb9cda8a24e4d469242 Mon Sep 17 00:00:00 2001
   2 From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
   3 Date: Fri, 6 May 2016 09:09:32 +0530
   4 Subject: [PATCH 24/93] config: ls1012aqds: Add USB EHCI support for
   5  ls1012aqds
   6
   7 Add USB EHCI support for ls1012aqds platform
   8
   9 Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
  10 Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
  11 ---
  12  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |    1 +
  13  include/configs/ls1012aqds.h                       |    5 +++++
  14  include/usb/ehci-fsl.h                             |    2 +-
  15  3 files changed, 7 insertions(+), 1 deletion(-)
  16
  17 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  18 index 3e37f00..24add1a 100644
  19 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  20 +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
  21 @@ -36,6 +36,7 @@
  22  #define CONFIG_SYS_XHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x01f00000)
  23  #define CONFIG_SYS_XHCI_USB2_ADDR              (CONFIG_SYS_IMMR + 0x02000000)
  24  #define CONFIG_SYS_XHCI_USB3_ADDR              (CONFIG_SYS_IMMR + 0x02100000)
  25 +#define CONFIG_SYS_EHCI_USB1_ADDR              (CONFIG_SYS_IMMR + 0x07600000)
  26  #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
  27  #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
  28  #define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
  29 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
  30 index bb433de..51ca902 100644
  31 --- a/include/configs/ls1012aqds.h
  32 +++ b/include/configs/ls1012aqds.h
  33 @@ -109,6 +109,8 @@
  34  #ifdef CONFIG_HAS_FSL_DR_USB
  35  #define CONFIG_USB_EHCI
  36  #define CONFIG_USB_EHCI_FSL
  37 +#define CONFIG_USB_ULPI
  38 +#define CONFIG_USB_ULPI_VIEWPORT
  39  #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  40  #endif
  41
  42 @@ -121,6 +123,9 @@
  43  #define CONFIG_USB_XHCI_DWC3
  44  #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
  45  #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
  46 +#endif
  47 +
  48 +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)
  49  #define CONFIG_CMD_USB
  50  #define CONFIG_USB_STORAGE
  51  #define CONFIG_CMD_EXT2
  52 diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h
  53 index b8d78d0..94b1efa 100644
  54 --- a/include/usb/ehci-fsl.h
  55 +++ b/include/usb/ehci-fsl.h
  56 @@ -163,7 +163,7 @@
  57  #elif defined(CONFIG_MPC512X)
  58  #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
  59  #define CONFIG_SYS_FSL_USB2_ADDR       0
  60 -#elif defined(CONFIG_LS102XA)
  61 +#elif defined(CONFIG_LS102XA) || defined(CONFIG_LS1012A)
  62  #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR
  63  #define CONFIG_SYS_FSL_USB2_ADDR        0
  64  #endif
  65 --
  66 1.7.9.5
  67