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1 From a719f7ba7fcba05d85801c6f0267f389a21627c1 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
3 Date: Fri, 24 Sep 2021 13:03:02 +0200
4 Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver
5 configuration
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Port number is encoded into argument for SMC call. It is zero for SATA,
11 PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY
12 (incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero
13 port number.
14
15 So construct "port" bits for SMC call argument can be constructed directly
16 from PHY type and lane number.
17
18 Change driver code to always pass zero port number for non-ethernet PHYs
19 and for ethernet PHYs determinate port number from lane number. This
20 simplifies the driver.
21
22 As port number from DT PHY configuration is not used anymore, remove whole
23 driver code which parses it. This also simplifies the driver.
24
25 Signed-off-by: Pali Rohár <pali@kernel.org>
26 Signed-off-by: Marek Behún <kabel@kernel.org>
27 Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
28 ---
29 drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 62 +++++++++-----------
30 1 file changed, 29 insertions(+), 33 deletions(-)
31
32 --- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
33 +++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c
34 @@ -20,7 +20,6 @@
35 #include <linux/platform_device.h>
36
37 #define MVEBU_A3700_COMPHY_LANES 3
38 -#define MVEBU_A3700_COMPHY_PORTS 2
39
40 /* COMPHY Fast SMC function identifiers */
41 #define COMPHY_SIP_POWER_ON 0x82000001
42 @@ -45,51 +44,47 @@
43 #define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \
44 ((idx) << 8) | \
45 ((speed) << 2))
46 -#define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \
47 +#define COMPHY_FW_PCIE(mode, speed, width) (COMPHY_FW_NET(mode, 0, speed) | \
48 ((width) << 18))
49
50 struct mvebu_a3700_comphy_conf {
51 unsigned int lane;
52 enum phy_mode mode;
53 int submode;
54 - unsigned int port;
55 u32 fw_mode;
56 };
57
58 -#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \
59 +#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _fw) \
60 { \
61 .lane = _lane, \
62 .mode = _mode, \
63 .submode = _smode, \
64 - .port = _port, \
65 .fw_mode = _fw, \
66 }
67
68 -#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \
69 - MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw)
70 +#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _fw) \
71 + MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _fw)
72
73 -#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \
74 - MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw)
75 +#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _fw) \
76 + MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _fw)
77
78 static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = {
79 /* lane 0 */
80 - MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0,
81 + MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS,
82 COMPHY_FW_MODE_USB3H),
83 - MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1,
84 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII,
85 COMPHY_FW_MODE_SGMII),
86 - MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1,
87 + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX,
88 COMPHY_FW_MODE_2500BASEX),
89 /* lane 1 */
90 - MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0,
91 - COMPHY_FW_MODE_PCIE),
92 - MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0,
93 + MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE),
94 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII,
95 COMPHY_FW_MODE_SGMII),
96 - MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0,
97 + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX,
98 COMPHY_FW_MODE_2500BASEX),
99 /* lane 2 */
100 - MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0,
101 - COMPHY_FW_MODE_SATA),
102 - MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0,
103 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, COMPHY_FW_MODE_SATA),
104 + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS,
105 COMPHY_FW_MODE_USB3H),
106 };
107
108 @@ -98,7 +93,6 @@ struct mvebu_a3700_comphy_lane {
109 unsigned int id;
110 enum phy_mode mode;
111 int submode;
112 - int port;
113 };
114
115 static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane,
116 @@ -120,7 +114,7 @@ static int mvebu_a3700_comphy_smc(unsign
117 }
118 }
119
120 -static int mvebu_a3700_comphy_get_fw_mode(int lane, int port,
121 +static int mvebu_a3700_comphy_get_fw_mode(int lane,
122 enum phy_mode mode,
123 int submode)
124 {
125 @@ -132,7 +126,6 @@ static int mvebu_a3700_comphy_get_fw_mod
126
127 for (i = 0; i < n; i++) {
128 if (mvebu_a3700_comphy_modes[i].lane == lane &&
129 - mvebu_a3700_comphy_modes[i].port == port &&
130 mvebu_a3700_comphy_modes[i].mode == mode &&
131 mvebu_a3700_comphy_modes[i].submode == submode)
132 break;
133 @@ -153,7 +146,7 @@ static int mvebu_a3700_comphy_set_mode(s
134 if (submode == PHY_INTERFACE_MODE_1000BASEX)
135 submode = PHY_INTERFACE_MODE_SGMII;
136
137 - fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode,
138 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, mode,
139 submode);
140 if (fw_mode < 0) {
141 dev_err(lane->dev, "invalid COMPHY mode\n");
142 @@ -172,9 +165,10 @@ static int mvebu_a3700_comphy_power_on(s
143 struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy);
144 u32 fw_param;
145 int fw_mode;
146 + int fw_port;
147 int ret;
148
149 - fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port,
150 + fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id,
151 lane->mode, lane->submode);
152 if (fw_mode < 0) {
153 dev_err(lane->dev, "invalid COMPHY mode\n");
154 @@ -191,17 +185,18 @@ static int mvebu_a3700_comphy_power_on(s
155 fw_param = COMPHY_FW_MODE(fw_mode);
156 break;
157 case PHY_MODE_ETHERNET:
158 + fw_port = (lane->id == 0) ? 1 : 0;
159 switch (lane->submode) {
160 case PHY_INTERFACE_MODE_SGMII:
161 dev_dbg(lane->dev, "set lane %d to SGMII mode\n",
162 lane->id);
163 - fw_param = COMPHY_FW_NET(fw_mode, lane->port,
164 + fw_param = COMPHY_FW_NET(fw_mode, fw_port,
165 COMPHY_FW_SPEED_1_25G);
166 break;
167 case PHY_INTERFACE_MODE_2500BASEX:
168 dev_dbg(lane->dev, "set lane %d to 2500BASEX mode\n",
169 lane->id);
170 - fw_param = COMPHY_FW_NET(fw_mode, lane->port,
171 + fw_param = COMPHY_FW_NET(fw_mode, fw_port,
172 COMPHY_FW_SPEED_3_125G);
173 break;
174 default:
175 @@ -212,8 +207,7 @@ static int mvebu_a3700_comphy_power_on(s
176 break;
177 case PHY_MODE_PCIE:
178 dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id);
179 - fw_param = COMPHY_FW_PCIE(fw_mode, lane->port,
180 - COMPHY_FW_SPEED_5G,
181 + fw_param = COMPHY_FW_PCIE(fw_mode, COMPHY_FW_SPEED_5G,
182 phy->attrs.bus_width);
183 break;
184 default:
185 @@ -247,17 +241,20 @@ static struct phy *mvebu_a3700_comphy_xl
186 struct of_phandle_args *args)
187 {
188 struct mvebu_a3700_comphy_lane *lane;
189 + unsigned int port;
190 struct phy *phy;
191
192 - if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS))
193 - return ERR_PTR(-EINVAL);
194 -
195 phy = of_phy_simple_xlate(dev, args);
196 if (IS_ERR(phy))
197 return phy;
198
199 lane = phy_get_drvdata(phy);
200 - lane->port = args->args[0];
201 +
202 + port = args->args[0];
203 + if (port != 0 && (port != 1 || lane->id != 0)) {
204 + dev_err(lane->dev, "invalid port number %u\n", port);
205 + return ERR_PTR(-EINVAL);
206 + }
207
208 return phy;
209 }
210 @@ -302,7 +299,6 @@ static int mvebu_a3700_comphy_probe(stru
211 lane->mode = PHY_MODE_INVALID;
212 lane->submode = PHY_INTERFACE_MODE_NA;
213 lane->id = lane_id;
214 - lane->port = -1;
215 phy_set_drvdata(phy, lane);
216 }
217
Staging tree of Jo-Philipp Wich