4badeb1baddf78462b79d770cb3b012ad2f45c86
[openwrt/staging/linusw.git] /
1 From e4402c2622756ab56d02159a8ff3c54165ab577c Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Thu, 3 Feb 2022 11:17:16 +0000
4 Subject: [PATCH] dtoverlay: Reduce size of PCIE IB window in
5 pcie-32-dma overlay
6
7 The PCIE inbound window is rounded up to a power of 2, so the default
8 of 3GB rounds up to 4GB starting at 0. This prohibits the MSI vector
9 sitting at 0x0_fffffffc, and causes warnings from some subsystems
10 (eg ahci) of a 64bit address on a 32bit configuration.
11
12 Reduce the window down to 2GB to avoid this issue.
13
14 https://github.com/raspberrypi/linux/issues/4848
15
16 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
17 ---
18 .../dts/overlays/pcie-32bit-dma-overlay.dts | 20 +++++++++++++++++++
19 1 file changed, 20 insertions(+)
20
21 --- a/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
22 +++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
23 @@ -11,8 +11,28 @@
24 fragment@0 {
25 target-path = "/aliases";
26 __overlay__ {
27 + /*
28 + * Removing this alias stops the firmware patching the
29 + * PCIE DT dma-ranges based on the detected chip
30 + * revision.
31 + */
32 pcie0 = "";
33 };
34 };
35
36 + fragment@1 {
37 + target = <&pcie0>;
38 + __overlay__ {
39 + /*
40 + * The size of the range is rounded up to a power of 2,
41 + * so the range ends up being 0-4GB, and the MSI vector
42 + * gets pushed beyond 4GB.
43 + */
44 + #address-cells = <3>;
45 + #size-cells = <2>;
46 + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000
47 + 0x0 0x80000000>;
48 + };
49 + };
50 +
51 };