1 From c6c55ad6f9269c703e8b7f9832640dbc0390238a Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Thu, 2 May 2019 15:24:04 -0700
4 Subject: [PATCH] clk: bcm2835: Allow reparenting leaf clocks while
7 This falls under the same "we can reprogram glitch-free as long as we
8 pause generation" rule as updating the div/frac fields. This can be
9 used for runtime reclocking of V3D to manage power leakage.
11 Signed-off-by: Eric Anholt <eric@anholt.net>
13 drivers/clk/bcm/clk-bcm2835.c | 19 ++++++++++++++++---
14 1 file changed, 16 insertions(+), 3 deletions(-)
16 --- a/drivers/clk/bcm/clk-bcm2835.c
17 +++ b/drivers/clk/bcm/clk-bcm2835.c
18 @@ -1099,8 +1099,10 @@ static int bcm2835_clock_on(struct clk_h
22 -static int bcm2835_clock_set_rate(struct clk_hw *hw,
23 - unsigned long rate, unsigned long parent_rate)
24 +static int bcm2835_clock_set_rate_and_parent(struct clk_hw *hw,
26 + unsigned long parent_rate,
29 struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
30 struct bcm2835_cprman *cprman = clock->cprman;
31 @@ -1122,6 +1124,11 @@ static int bcm2835_clock_set_rate(struct
32 bcm2835_clock_wait_busy(clock);
35 + if (parent != 0xff) {
36 + ctl &= ~(CM_SRC_MASK << CM_SRC_SHIFT);
37 + ctl |= parent << CM_SRC_SHIFT;
41 ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
42 cprman_write(cprman, data->ctl_reg, ctl);
43 @@ -1133,6 +1140,12 @@ static int bcm2835_clock_set_rate(struct
47 +static int bcm2835_clock_set_rate(struct clk_hw *hw,
48 + unsigned long rate, unsigned long parent_rate)
50 + return bcm2835_clock_set_rate_and_parent(hw, rate, parent_rate, 0xff);
54 bcm2835_clk_is_pllc(struct clk_hw *hw)
56 @@ -1316,6 +1329,7 @@ static const struct clk_ops bcm2835_cloc
57 .unprepare = bcm2835_clock_off,
58 .recalc_rate = bcm2835_clock_get_rate,
59 .set_rate = bcm2835_clock_set_rate,
60 + .set_rate_and_parent = bcm2835_clock_set_rate_and_parent,
61 .determine_rate = bcm2835_clock_determine_rate,
62 .set_parent = bcm2835_clock_set_parent,
63 .get_parent = bcm2835_clock_get_parent,
64 @@ -1498,7 +1512,6 @@ static struct clk_hw *bcm2835_register_c
65 init.ops = &bcm2835_vpu_clock_clk_ops;
67 init.ops = &bcm2835_clock_clk_ops;
68 - init.flags |= CLK_SET_PARENT_GATE;
70 /* If the clock wasn't actually enabled at boot, it's not