54680de0b7ca7d5a1996d46da8dd3a0725b6b4fe
[openwrt/staging/robimarko.git] /
1 From e5810fa0c1bed16fdfb408862a2e17e962ec5cf6 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
3 Date: Tue, 28 Oct 2014 14:40:38 +0100
4 Subject: [PATCH 158/158] MIPS: BCM47XX: Initialize bcma bus later (with mm
5 available)
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 Initializaion with memory allocator available will be much simpler, this
11 will allow cleanup in the bcma code.
12
13 Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
14 Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
15 Cc: linux-mips@linux-mips.org
16 Patchwork: https://patchwork.linux-mips.org/patch/8234/
17 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
18 ---
19 arch/mips/bcm47xx/bcm47xx_private.h | 3 +++
20 arch/mips/bcm47xx/irq.c | 8 ++++++++
21 arch/mips/bcm47xx/setup.c | 33 +++++++++++++++++++++++++++------
22 3 files changed, 38 insertions(+), 6 deletions(-)
23
24 diff --git a/arch/mips/bcm47xx/bcm47xx_private.h b/arch/mips/bcm47xx/bcm47xx_private.h
25 index 12a112d..ea909a5 100644
26 --- a/arch/mips/bcm47xx/bcm47xx_private.h
27 +++ b/arch/mips/bcm47xx/bcm47xx_private.h
28 @@ -15,6 +15,9 @@ int __init bcm47xx_buttons_register(void);
29 /* leds.c */
30 void __init bcm47xx_leds_register(void);
31
32 +/* setup.c */
33 +void __init bcm47xx_bus_setup(void);
34 +
35 /* workarounds.c */
36 void __init bcm47xx_workarounds(void);
37
38 diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
39 index e0585b7..21b4497 100644
40 --- a/arch/mips/bcm47xx/irq.c
41 +++ b/arch/mips/bcm47xx/irq.c
42 @@ -22,6 +22,8 @@
43 * 675 Mass Ave, Cambridge, MA 02139, USA.
44 */
45
46 +#include "bcm47xx_private.h"
47 +
48 #include <linux/types.h>
49 #include <linux/interrupt.h>
50 #include <linux/irq.h>
51 @@ -65,6 +67,12 @@ DEFINE_HWx_IRQDISPATCH(7)
52
53 void __init arch_init_irq(void)
54 {
55 + /*
56 + * This is the first arch callback after mm_init (we can use kmalloc),
57 + * so let's finish bus initialization now.
58 + */
59 + bcm47xx_bus_setup();
60 +
61 #ifdef CONFIG_BCM47XX_BCMA
62 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
63 bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
64 diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
65 index 444c65a..e43b504 100644
66 --- a/arch/mips/bcm47xx/setup.c
67 +++ b/arch/mips/bcm47xx/setup.c
68 @@ -156,15 +156,14 @@ static void __init bcm47xx_register_bcma(void)
69 err = bcma_host_soc_register(&bcm47xx_bus.bcma);
70 if (err)
71 panic("Failed to register BCMA bus (err %d)", err);
72 -
73 - err = bcma_host_soc_init(&bcm47xx_bus.bcma);
74 - if (err)
75 - panic("Failed to initialize BCMA bus (err %d)", err);
76 -
77 - bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
78 }
79 #endif
80
81 +/*
82 + * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed
83 + * to detect memory and record it with add_memory_region.
84 + * Any extra initializaion performed here must not use kmalloc or bootmem.
85 + */
86 void __init plat_mem_setup(void)
87 {
88 struct cpuinfo_mips *c = &current_cpu_data;
89 @@ -193,6 +192,28 @@ void __init plat_mem_setup(void)
90 _machine_restart = bcm47xx_machine_restart;
91 _machine_halt = bcm47xx_machine_halt;
92 pm_power_off = bcm47xx_machine_halt;
93 +}
94 +
95 +/*
96 + * This finishes bus initialization doing things that were not possible without
97 + * kmalloc. Make sure to call it late enough (after mm_init).
98 + */
99 +void __init bcm47xx_bus_setup(void)
100 +{
101 +#ifdef CONFIG_BCM47XX_BCMA
102 + if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
103 + int err;
104 +
105 + err = bcma_host_soc_init(&bcm47xx_bus.bcma);
106 + if (err)
107 + panic("Failed to initialize BCMA bus (err %d)", err);
108 +
109 + bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo,
110 + NULL);
111 + }
112 +#endif
113 +
114 + /* With bus initialized we can access NVRAM and detect the board */
115 bcm47xx_board_detect();
116 mips_set_machine_name(bcm47xx_board_get_name());
117 }
118 --
119 1.8.4.5
120