5598a4619b03c11837387d54f1779112a7fadbd5
[openwrt/staging/dangole.git] /
1 From 6510ecc6c76d040cc5a84f7464b5f327f2c556e9 Mon Sep 17 00:00:00 2001
2 From: Stefan Schake <stschake@gmail.com>
3 Date: Fri, 9 Mar 2018 01:53:37 +0100
4 Subject: [PATCH 347/454] drm/vc4: Enable background color fill when necessary
5
6 commit 1d49f2e546a5a3258a88f85a1c04fd6feb6def37 upstream.
7
8 Using the hint from the plane state, we turn on the background color
9 to avoid display corruption from planes blending with the background.
10
11 Changes from v1:
12 - Use needs_bg_fill from plane state
13
14 Signed-off-by: Stefan Schake <stschake@gmail.com>
15 Signed-off-by: Eric Anholt <eric@anholt.net>
16 Reviewed-by: Eric Anholt <eric@anholt.net>
17 Link: https://patchwork.freedesktop.org/patch/msgid/1520556817-97297-5-git-send-email-stschake@gmail.com
18 ---
19 drivers/gpu/drm/vc4/vc4_crtc.c | 25 +++++++++++++++++++++++++
20 1 file changed, 25 insertions(+)
21
22 --- a/drivers/gpu/drm/vc4/vc4_crtc.c
23 +++ b/drivers/gpu/drm/vc4/vc4_crtc.c
24 @@ -646,9 +646,12 @@ static void vc4_crtc_atomic_flush(struct
25 {
26 struct drm_device *dev = crtc->dev;
27 struct vc4_dev *vc4 = to_vc4_dev(dev);
28 + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
29 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
30 struct drm_plane *plane;
31 + struct vc4_plane_state *vc4_plane_state;
32 bool debug_dump_regs = false;
33 + bool enable_bg_fill = false;
34 u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
35 u32 __iomem *dlist_next = dlist_start;
36
37 @@ -659,6 +662,20 @@ static void vc4_crtc_atomic_flush(struct
38
39 /* Copy all the active planes' dlist contents to the hardware dlist. */
40 drm_atomic_crtc_for_each_plane(plane, crtc) {
41 + /* Is this the first active plane? */
42 + if (dlist_next == dlist_start) {
43 + /* We need to enable background fill when a plane
44 + * could be alpha blending from the background, i.e.
45 + * where no other plane is underneath. It suffices to
46 + * consider the first active plane here since we set
47 + * needs_bg_fill such that either the first plane
48 + * already needs it or all planes on top blend from
49 + * the first or a lower plane.
50 + */
51 + vc4_plane_state = to_vc4_plane_state(plane->state);
52 + enable_bg_fill = vc4_plane_state->needs_bg_fill;
53 + }
54 +
55 dlist_next += vc4_plane_write_dlist(plane, dlist_next);
56 }
57
58 @@ -667,6 +684,14 @@ static void vc4_crtc_atomic_flush(struct
59
60 WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
61
62 + if (enable_bg_fill)
63 + /* This sets a black background color fill, as is the case
64 + * with other DRM drivers.
65 + */
66 + HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
67 + HVS_READ(SCALER_DISPBKGNDX(vc4_crtc->channel)) |
68 + SCALER_DISPBKGND_FILL);
69 +
70 /* Only update DISPLIST if the CRTC was already running and is not
71 * being disabled.
72 * vc4_crtc_enable() takes care of updating the dlist just after