git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From aa985e8be1c2fe4600b68831808c0b70241a37a6 Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Mon, 24 Apr 2023 16:30:07 +0100
   4 Subject: [PATCH] dtoverlays: Add overrides for alternate i2c buses to
   5  i2c-pwm-pva9685a
   6
   7 The i2c-pwm-pca9685a overlay was fixed to i2c-1. Add overrides to allow
   8 it to be assigned to alternate buses.
   9
  10 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  11 ---
  12  arch/arm/boot/dts/overlays/README             | 10 +++++
  13  .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 37 ++++++++++++++++++-
  14  2 files changed, 46 insertions(+), 1 deletion(-)
  15
  16 --- a/arch/arm/boot/dts/overlays/README
  17 +++ b/arch/arm/boot/dts/overlays/README
  18 @@ -1857,6 +1857,16 @@ Name:   i2c-pwm-pca9685a
  19  Info:   Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
  20  Load:   dtoverlay=i2c-pwm-pca9685a,<param>=<val>
  21  Params: addr                    I2C address of PCA9685A (default 0x40)
  22 +        i2c0                    Choose the I2C0 bus on GPIOs 0&1
  23 +        i2c_csi_dsi             Choose the I2C0 bus on GPIOs 44&45
  24 +        i2c3                    Choose the I2C3 bus (configure with the i2c3
  25 +                                overlay - BCM2711 only)
  26 +        i2c4                    Choose the I2C3 bus (configure with the i2c3
  27 +                                overlay - BCM2711 only)
  28 +        i2c5                    Choose the I2C5 bus (configure with the i2c4
  29 +                                overlay - BCM2711 only)
  30 +        i2c6                    Choose the I2C6 bus (configure with the i2c6
  31 +                                overlay - BCM2711 only)
  32
  33
  34  Name:   i2c-rtc
  35 --- a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
  36 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
  37 @@ -6,7 +6,7 @@
  38         compatible = "brcm,bcm2835";
  39
  40         fragment@0 {
  41 -               target = <&i2c_arm>;
  42 +               target = <&i2cbus>;
  43                 __overlay__ {
  44                         #address-cells = <1>;
  45                         #size-cells = <0>;
  46 @@ -20,7 +20,42 @@
  47                         };
  48                 };
  49         };
  50 +
  51 +
  52 +       frag100: fragment@100 {
  53 +               target = <&i2c_arm>;
  54 +               i2cbus: __overlay__ {
  55 +                       status = "okay";
  56 +               };
  57 +       };
  58 +
  59 +       fragment@101 {
  60 +               target = <&i2c0if>;
  61 +               __dormant__ {
  62 +                       status = "okay";
  63 +               };
  64 +       };
  65 +
  66 +       fragment@102 {
  67 +               target = <&i2c0mux>;
  68 +               __dormant__ {
  69 +                       status = "okay";
  70 +               };
  71 +       };
  72 +
  73         __overrides__ {
  74                 addr = <&pca>,"reg:0";
  75 +               i2c0 = <&frag100>, "target:0=",<&i2c0>,
  76 +                             <0>,"+101+102";
  77 +               i2c_csi_dsi = <&frag100>, "target:0=",<&i2c_csi_dsi>,
  78 +                             <0>,"+101+102";
  79 +               i2c3 = <&frag100>, "target?=0",
  80 +                      <&frag100>, "target-path=i2c3";
  81 +               i2c4 = <&frag100>, "target?=0",
  82 +                      <&frag100>, "target-path=i2c4";
  83 +               i2c5 = <&frag100>, "target?=0",
  84 +                      <&frag100>, "target-path=i2c5";
  85 +               i2c6 = <&frag100>, "target?=0",
  86 +                      <&frag100>, "target-path=i2c6";
  87         };
  88  };