git.openwrt.org Git - openwrt/staging/neocturne.git/blob

   1 From d278f43f25beedfd0cb784d1dd0a9e7e8c8f123f Mon Sep 17 00:00:00 2001
   2 From: Daniel Golle <daniel@makrotopia.org>
   3 Date: Wed, 19 Apr 2023 20:15:53 +0100
   4 Subject: [PATCH] arm64: dts: mt7622: declare SPI-NAND present on BPI-R64
   5
   6 The SPI-NOR node in the device tree of the BananaPi R64 has most likely
   7 been copied from the reference board's device tree even though the R64
   8 comes with an SPI-NAND chip rather than SPI-NOR.
   9
  10 Setup the Serial NAND Flash Interface (SNFI) controller, enable
  11 hardware BCH error detection and correction engine and add the SPI-NAND
  12 chip including basic partitions,
  13
  14 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  15 Link: https://lore.kernel.org/r/ZEA96dmaXqTpk8u8@makrotopia.org
  16 Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
  17 ---
  18  .../dts/mediatek/mt7622-bananapi-bpi-r64.dts  | 38 ++++++++++++++++---
  19  1 file changed, 33 insertions(+), 5 deletions(-)
  20
  21 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
  22 +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
  23 @@ -253,14 +253,42 @@
  24         status = "disabled";
  25  };
  26
  27 -&nor_flash {
  28 -       pinctrl-names = "default";
  29 -       pinctrl-0 = <&spi_nor_pins>;
  30 -       status = "disabled";
  31 +&bch {
  32 +       status = "okay";
  33 +};
  34
  35 +&snfi {
  36 +       pinctrl-names = "default";
  37 +       pinctrl-0 = <&serial_nand_pins>;
  38 +       status = "okay";
  39         flash@0 {
  40 -               compatible = "jedec,spi-nor";
  41 +               compatible = "spi-nand";
  42                 reg = <0>;
  43 +               spi-tx-bus-width = <4>;
  44 +               spi-rx-bus-width = <4>;
  45 +               nand-ecc-engine = <&snfi>;
  46 +               partitions {
  47 +                       compatible = "fixed-partitions";
  48 +                       #address-cells = <1>;
  49 +                       #size-cells = <1>;
  50 +
  51 +                       partition@0 {
  52 +                               label = "bl2";
  53 +                               reg = <0x0 0x80000>;
  54 +                               read-only;
  55 +                       };
  56 +
  57 +                       partition@80000 {
  58 +                               label = "fip";
  59 +                               reg = <0x80000 0x200000>;
  60 +                               read-only;
  61 +                       };
  62 +
  63 +                       ubi: partition@280000 {
  64 +                               label = "ubi";
  65 +                               reg = <0x280000 0x7d80000>;
  66 +                       };
  67 +               };
  68         };
  69  };
  70