64a4a72fa6ae96de7cda94bceb89b618cef173eb
[openwrt/staging/neocturne.git] /
1 From c000dca098002da193b98099df051c9ead0cacb4 Mon Sep 17 00:00:00 2001
2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
3 Date: Thu, 27 Oct 2022 14:10:52 +0100
4 Subject: [PATCH 03/10] net: mtk_eth_soc: add pcs_get_state() implementation
5
6 Add a pcs_get_state() implementation which uses the advertisements
7 to compute the resulting link modes, and BMSR contents to determine
8 negotiation and link status.
9
10 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
11 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
12 ---
13 drivers/net/ethernet/mediatek/mtk_sgmii.c | 15 +++++++++++++++
14 1 file changed, 15 insertions(+)
15
16 --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
17 +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
18 @@ -19,6 +19,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
19 return container_of(pcs, struct mtk_pcs, pcs);
20 }
21
22 +static void mtk_pcs_get_state(struct phylink_pcs *pcs,
23 + struct phylink_link_state *state)
24 +{
25 + struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
26 + unsigned int bm, adv;
27 +
28 + /* Read the BMSR and LPA */
29 + regmap_read(mpcs->regmap, SGMSYS_PCS_CONTROL_1, &bm);
30 + regmap_read(mpcs->regmap, SGMSYS_PCS_ADVERTISE, &adv);
31 +
32 + phylink_mii_c22_pcs_decode_state(state, FIELD_GET(SGMII_BMSR, bm),
33 + FIELD_GET(SGMII_LPA, adv));
34 +}
35 +
36 /* For SGMII interface mode */
37 static void mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
38 {
39 @@ -117,6 +131,7 @@ static void mtk_pcs_link_up(struct phyli
40 }
41
42 static const struct phylink_pcs_ops mtk_pcs_ops = {
43 + .pcs_get_state = mtk_pcs_get_state,
44 .pcs_config = mtk_pcs_config,
45 .pcs_an_restart = mtk_pcs_restart_an,
46 .pcs_link_up = mtk_pcs_link_up,