git.openwrt.org Git - openwrt/staging/stintel.git/blob

   1 From 6a3bdc5209f45d2af83aa92433ab6e5cf2297aa4 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Mon, 22 Nov 2021 16:23:47 +0100
   4 Subject: net: dsa: qca8k: add set_ageing_time support
   5
   6 qca8k support setting ageing time in step of 7s. Add support for it and
   7 set the max value accepted of 7645m.
   8 Documentation talks about support for 10000m but that values doesn't
   9 make sense as the value doesn't match the max value in the reg.
  10
  11 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  12 Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
  13 Signed-off-by: David S. Miller <davem@davemloft.net>
  14 ---
  15  drivers/net/dsa/qca8k.c | 25 +++++++++++++++++++++++++
  16  drivers/net/dsa/qca8k.h |  3 +++
  17  2 files changed, 28 insertions(+)
  18
  19 --- a/drivers/net/dsa/qca8k.c
  20 +++ b/drivers/net/dsa/qca8k.c
  21 @@ -1261,6 +1261,10 @@ qca8k_setup(struct dsa_switch *ds)
  22         /* We don't have interrupts for link changes, so we need to poll */
  23         ds->pcs_poll = true;
  24
  25 +       /* Set min a max ageing value supported */
  26 +       ds->ageing_time_min = 7000;
  27 +       ds->ageing_time_max = 458745000;
  28 +
  29         return 0;
  30  }
  31
  32 @@ -1801,6 +1805,26 @@ qca8k_port_fast_age(struct dsa_switch *d
  33  }
  34
  35  static int
  36 +qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)
  37 +{
  38 +       struct qca8k_priv *priv = ds->priv;
  39 +       unsigned int secs = msecs / 1000;
  40 +       u32 val;
  41 +
  42 +       /* AGE_TIME reg is set in 7s step */
  43 +       val = secs / 7;
  44 +
  45 +       /* Handle case with 0 as val to NOT disable
  46 +        * learning
  47 +        */
  48 +       if (!val)
  49 +               val = 1;
  50 +
  51 +       return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK,
  52 +                                 QCA8K_ATU_AGE_TIME(val));
  53 +}
  54 +
  55 +static int
  56  qca8k_port_enable(struct dsa_switch *ds, int port,
  57                   struct phy_device *phy)
  58  {
  59 @@ -2018,6 +2042,7 @@ static const struct dsa_switch_ops qca8k
  60         .get_strings            = qca8k_get_strings,
  61         .get_ethtool_stats      = qca8k_get_ethtool_stats,
  62         .get_sset_count         = qca8k_get_sset_count,
  63 +       .set_ageing_time        = qca8k_set_ageing_time,
  64         .get_mac_eee            = qca8k_get_mac_eee,
  65         .set_mac_eee            = qca8k_set_mac_eee,
  66         .port_enable            = qca8k_port_enable,
  67 --- a/drivers/net/dsa/qca8k.h
  68 +++ b/drivers/net/dsa/qca8k.h
  69 @@ -175,6 +175,9 @@
  70  #define   QCA8K_VTU_FUNC1_BUSY                         BIT(31)
  71  #define   QCA8K_VTU_FUNC1_VID_MASK                     GENMASK(27, 16)
  72  #define   QCA8K_VTU_FUNC1_FULL                         BIT(4)
  73 +#define QCA8K_REG_ATU_CTRL                             0x618
  74 +#define   QCA8K_ATU_AGE_TIME_MASK                      GENMASK(15, 0)
  75 +#define   QCA8K_ATU_AGE_TIME(x)                                FIELD_PREP(QCA8K_ATU_AGE_TIME_MASK, (x))
  76  #define QCA8K_REG_GLOBAL_FW_CTRL0                      0x620
  77  #define   QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN            BIT(10)
  78  #define QCA8K_REG_GLOBAL_FW_CTRL1                      0x624