6a525f2c3e6a182943782da07fcfdf49f25d7802
[openwrt/staging/blocktrron.git] /
1 From 72bc31aa621e21a7c36a7da8aa6f6a77bb234e0b Mon Sep 17 00:00:00 2001
2 From: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
3 Date: Wed, 6 Jul 2022 15:41:29 +0200
4 Subject: [PATCH] clk: qcom: reset: Allow specifying custom reset delay
5
6 The amount of time required between asserting and deasserting the reset
7 signal can vary depending on the involved hardware component. Sometimes
8 1 us might not be enough and a larger delay is necessary to conform to
9 the specifications.
10
11 Usually this is worked around in the consuming drivers, by replacing
12 reset_control_reset() with a sequence of reset_control_assert(), waiting
13 for a custom delay, followed by reset_control_deassert().
14
15 However, in some cases the driver making use of the reset is generic and
16 can be used with different reset controllers. In this case the reset
17 time requirement is better handled directly by the reset controller
18 driver.
19
20 Make this possible by adding an "udelay" field to the qcom_reset_map
21 that allows setting a different reset delay (in microseconds).
22
23 Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
24 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
25 Link: https://lore.kernel.org/r/20220706134132.3623415-4-stephan.gerhold@kernkonzept.com
26 ---
27 drivers/clk/qcom/reset.c | 4 +++-
28 drivers/clk/qcom/reset.h | 1 +
29 2 files changed, 4 insertions(+), 1 deletion(-)
30
31 --- a/drivers/clk/qcom/reset.c
32 +++ b/drivers/clk/qcom/reset.c
33 @@ -13,8 +13,10 @@
34
35 static int qcom_reset(struct reset_controller_dev *rcdev, unsigned long id)
36 {
37 + struct qcom_reset_controller *rst = to_qcom_reset_controller(rcdev);
38 +
39 rcdev->ops->assert(rcdev, id);
40 - udelay(1);
41 + udelay(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */
42 rcdev->ops->deassert(rcdev, id);
43 return 0;
44 }
45 --- a/drivers/clk/qcom/reset.h
46 +++ b/drivers/clk/qcom/reset.h
47 @@ -11,6 +11,7 @@
48 struct qcom_reset_map {
49 unsigned int reg;
50 u8 bit;
51 + u8 udelay;
52 };
53
54 struct regmap;