711b2e5f17023df77bdf8a5819b32b598c3b8e46
[openwrt/staging/stintel.git] /
1 From 38643fd0a26ba42938a361db296e28f3b4975d8c Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Wed, 31 Mar 2021 18:12:55 +0100
4 Subject: [PATCH] vc4/drm: SQUASH: Fix source offsets with
5 DRM_FORMAT_P030
6
7 x_off should only be within current stripe
8 The stripe number is accounted for elsewhere
9
10 Fixes: 9b1b1beb1c7e58b ("vc4/drm: Fix source offsets with DRM_FORMAT_P030")
11
12 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
13 ---
14 drivers/gpu/drm/vc4/vc4_plane.c | 5 +++--
15 1 file changed, 3 insertions(+), 2 deletions(-)
16
17 --- a/drivers/gpu/drm/vc4/vc4_plane.c
18 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
19 @@ -825,8 +825,9 @@ static int vc4_plane_mode_set(struct drm
20 * and bits[3:0] should be between 0 and 11, indicating which
21 * of the 12-pixels in that 128-bit word is the first pixel to be used
22 */
23 - u32 aligned = vc4_state->src_x / 12;
24 - u32 last_bits = vc4_state->src_x % 12;
25 + u32 remaining_pixels = vc4_state->src_x % 96;
26 + u32 aligned = remaining_pixels / 12;
27 + u32 last_bits = remaining_pixels % 12;
28
29 x_off = aligned * 16 + last_bits;
30 hvs_format = HVS_PIXEL_FORMAT_YCBCR_10BIT;