git.openwrt.org Git - openwrt/staging/thess.git/blob

   1 From 36152f87dda4af221b16258751451d9cd3d0fb0b Mon Sep 17 00:00:00 2001
   2 From: Frank Sae <Frank.Sae@motor-comm.com>
   3 Date: Thu, 2 Feb 2023 11:00:36 +0800
   4 Subject: [PATCH] net: phy: Add dts support for Motorcomm yt8531s gigabit
   5  ethernet phy
   6
   7 Add dts support for Motorcomm yt8531s gigabit ethernet phy.
   8  Change yt8521_probe to support clk config of yt8531s. Becase
   9  yt8521_probe does the things which yt8531s is needed, so
  10  removed yt8531s function.
  11  This patch has been verified on AM335x platform with yt8531s board.
  12
  13 Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com>
  14 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
  15 Signed-off-by: David S. Miller <davem@davemloft.net>
  16 ---
  17  drivers/net/phy/motorcomm.c | 51 ++++++++++++++++++++-----------------
  18  1 file changed, 27 insertions(+), 24 deletions(-)
  19
  20 --- a/drivers/net/phy/motorcomm.c
  21 +++ b/drivers/net/phy/motorcomm.c
  22 @@ -258,8 +258,6 @@
  23  #define YT8531_SCR_CLK_SRC_CLOCK_FROM_DIGITAL  3
  24  #define YT8531_SCR_CLK_SRC_REF_25M             4
  25  #define YT8531_SCR_CLK_SRC_SSC_25M             5
  26 -#define YT8531S_SYNCE_CFG_REG                  0xA012
  27 -#define YT8531S_SCR_SYNCE_ENABLE               BIT(6)
  28
  29  /* Extended Register  end */
  30
  31 @@ -858,7 +856,32 @@ static int yt8521_probe(struct phy_devic
  32                         return -EINVAL;
  33                 }
  34         } else if (phydev->drv->phy_id == PHY_ID_YT8531S) {
  35 -               return 0;
  36 +               switch (freq) {
  37 +               case YTPHY_DTS_OUTPUT_CLK_DIS:
  38 +                       mask = YT8531_SCR_SYNCE_ENABLE;
  39 +                       val = 0;
  40 +                       break;
  41 +               case YTPHY_DTS_OUTPUT_CLK_25M:
  42 +                       mask = YT8531_SCR_SYNCE_ENABLE |
  43 +                              YT8531_SCR_CLK_SRC_MASK |
  44 +                              YT8531_SCR_CLK_FRE_SEL_125M;
  45 +                       val = YT8531_SCR_SYNCE_ENABLE |
  46 +                             FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
  47 +                                        YT8531_SCR_CLK_SRC_REF_25M);
  48 +                       break;
  49 +               case YTPHY_DTS_OUTPUT_CLK_125M:
  50 +                       mask = YT8531_SCR_SYNCE_ENABLE |
  51 +                              YT8531_SCR_CLK_SRC_MASK |
  52 +                              YT8531_SCR_CLK_FRE_SEL_125M;
  53 +                       val = YT8531_SCR_SYNCE_ENABLE |
  54 +                             YT8531_SCR_CLK_FRE_SEL_125M |
  55 +                             FIELD_PREP(YT8531_SCR_CLK_SRC_MASK,
  56 +                                        YT8531_SCR_CLK_SRC_PLL_125M);
  57 +                       break;
  58 +               default:
  59 +                       phydev_warn(phydev, "Freq err:%u\n", freq);
  60 +                       return -EINVAL;
  61 +               }
  62         } else {
  63                 phydev_warn(phydev, "PHY id err\n");
  64                 return -EINVAL;
  65 @@ -869,26 +892,6 @@ static int yt8521_probe(struct phy_devic
  66  }
  67
  68  /**
  69 - * yt8531s_probe() - read chip config then set suitable polling_mode
  70 - * @phydev: a pointer to a &struct phy_device
  71 - *
  72 - * returns 0 or negative errno code
  73 - */
  74 -static int yt8531s_probe(struct phy_device *phydev)
  75 -{
  76 -       int ret;
  77 -
  78 -       /* Disable SyncE clock output by default */
  79 -       ret = ytphy_modify_ext_with_lock(phydev, YT8531S_SYNCE_CFG_REG,
  80 -                                        YT8531S_SCR_SYNCE_ENABLE, 0);
  81 -       if (ret < 0)
  82 -               return ret;
  83 -
  84 -       /* same as yt8521_probe */
  85 -       return yt8521_probe(phydev);
  86 -}
  87 -
  88 -/**
  89   * ytphy_utp_read_lpa() - read LPA then setup lp_advertising for utp
  90   * @phydev: a pointer to a &struct phy_device
  91   *
  92 @@ -1970,7 +1973,7 @@ static struct phy_driver motorcomm_phy_d
  93                 PHY_ID_MATCH_EXACT(PHY_ID_YT8531S),
  94                 .name           = "YT8531S Gigabit Ethernet",
  95                 .get_features   = yt8521_get_features,
  96 -               .probe          = yt8531s_probe,
  97 +               .probe          = yt8521_probe,
  98                 .read_page      = yt8521_read_page,
  99                 .write_page     = yt8521_write_page,
 100                 .get_wol        = ytphy_get_wol,