8fae8ade7532a239a261fc8e2eb5e97afb455e81
[openwrt/staging/blocktrron.git] /
1 From a3f36600fd758173c1ec315684e4ae72c6e85654 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Fri, 8 Jul 2022 15:38:45 +0200
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: add #size/address-cells to DTSI
5
6 Add #size-cells and #address-cells to the SoC DTSI to avoid duplicating
7 the same properties in board DTS files.
8
9 Remove the mentioned properties from current board DTS files.
10
11 Signed-off-by: Robert Marko <robimarko@gmail.com>
12 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
13 Link: https://lore.kernel.org/r/20220708133846.599735-1-robimarko@gmail.com
14 ---
15 arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 2 --
16 arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi | 3 ---
17 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 3 +++
18 3 files changed, 3 insertions(+), 5 deletions(-)
19
20 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
21 +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
22 @@ -5,8 +5,6 @@
23 #include "ipq8074.dtsi"
24
25 / {
26 - #address-cells = <0x2>;
27 - #size-cells = <0x2>;
28 model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
29 compatible = "qcom,ipq8074-hk01", "qcom,ipq8074";
30 interrupt-parent = <&intc>;
31 --- a/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
32 +++ b/arch/arm64/boot/dts/qcom/ipq8074-hk10.dtsi
33 @@ -7,9 +7,6 @@
34 #include "ipq8074.dtsi"
35
36 / {
37 - #address-cells = <0x2>;
38 - #size-cells = <0x2>;
39 -
40 interrupt-parent = <&intc>;
41
42 aliases {
43 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
44 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
45 @@ -7,6 +7,9 @@
46 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
47
48 / {
49 + #address-cells = <2>;
50 + #size-cells = <2>;
51 +
52 model = "Qualcomm Technologies, Inc. IPQ8074";
53 compatible = "qcom,ipq8074";
54