a0be1eda4d8cbb52f3bb7338363b98ecf59e2579
[openwrt/staging/stintel.git] /
1 From 58d3d07985c1adab31a3ed76360d016bb1c5b358 Mon Sep 17 00:00:00 2001
2 From: Matthew Hagan <mnhagan88@gmail.com>
3 Date: Fri, 15 Oct 2021 23:50:22 +0100
4 Subject: [PATCH] ARM: dts: NSP: MX65: add qca8k falling-edge, PLL properties
5
6 This patch enables two properties for the QCA8337 switches on the MX65.
7
8 Set the SGMII transmit clock to falling edge
9 "qca,sgmii-txclk-falling-edge" to conform to the OEM configuration [1].
10
11 The new explicit PLL enable option "qca,sgmii-enable-pll" is required
12 [2].
13
14 [1] https://git.kernel.org/netdev/net-next/c/6c43809bf1be
15 [2] https://git.kernel.org/netdev/net-next/c/bbc4799e8bb6
16
17 Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
18 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
19 ---
20 arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 4 ++++
21 1 file changed, 4 insertions(+)
22
23 --- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
24 +++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi
25 @@ -118,6 +118,8 @@
26 reg = <0>;
27 ethernet = <&sgmii1>;
28 phy-mode = "sgmii";
29 + qca,sgmii-enable-pll;
30 + qca,sgmii-txclk-falling-edge;
31 fixed-link {
32 speed = <1000>;
33 full-duplex;
34 @@ -194,6 +196,8 @@
35 reg = <0>;
36 ethernet = <&sgmii0>;
37 phy-mode = "sgmii";
38 + qca,sgmii-enable-pll;
39 + qca,sgmii-txclk-falling-edge;
40 fixed-link {
41 speed = <1000>;
42 full-duplex;