a26f67e36e048275f3ae3061a5b0da6f2d2eef04
[openwrt/staging/stintel.git] /
1 From 4f865bdcb44fb18951de94be5c2ec37a891a8d03 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Sat, 26 Feb 2022 14:52:34 +0100
4 Subject: [PATCH 14/14] clk: qcom: gcc-ipq806x: add CryptoEngine resets
5
6 Add missing CryptoEngine resets.
7
8 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
9 Reviewed-by: Stephen Boyd <sboyd@kernel.org>
10 Tested-by: Jonathan McDowell <noodles@earth.li>
11 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
12 Link: https://lore.kernel.org/r/20220226135235.10051-15-ansuelsmth@gmail.com
13 ---
14 drivers/clk/qcom/gcc-ipq806x.c | 5 +++++
15 1 file changed, 5 insertions(+)
16
17 --- a/drivers/clk/qcom/gcc-ipq806x.c
18 +++ b/drivers/clk/qcom/gcc-ipq806x.c
19 @@ -3320,6 +3320,11 @@ static const struct qcom_reset_map gcc_i
20 [GMAC_CORE3_RESET] = { 0x3cfc, 0 },
21 [GMAC_CORE4_RESET] = { 0x3d1c, 0 },
22 [GMAC_AHB_RESET] = { 0x3e24, 0 },
23 + [CRYPTO_ENG1_RESET] = { 0x3e00, 0},
24 + [CRYPTO_ENG2_RESET] = { 0x3e04, 0},
25 + [CRYPTO_ENG3_RESET] = { 0x3e08, 0},
26 + [CRYPTO_ENG4_RESET] = { 0x3e0c, 0},
27 + [CRYPTO_AHB_RESET] = { 0x3e10, 0},
28 [NSS_CH0_RST_RX_CLK_N_RESET] = { 0x3b60, 0 },
29 [NSS_CH0_RST_TX_CLK_N_RESET] = { 0x3b60, 1 },
30 [NSS_CH0_RST_RX_125M_N_RESET] = { 0x3b60, 2 },