a48ea3742bb16e096946e2db355b57be9daa36d5
[openwrt/staging/neocturne.git] /
1 From 7105a86760bd9e4d107075cefc75016b693a5542 Mon Sep 17 00:00:00 2001
2 From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
3 Date: Wed, 19 Apr 2023 08:11:45 +0200
4 Subject: [PATCH 16/42] Revert "thermal/drivers/mediatek: Add delay after
5 thermal banks initialization"
6
7 Some more testing revealed that this commit introduces a regression on some
8 MT8173 Chromebooks and at least on one MT6795 Sony Xperia M5 smartphone due
9 to the delay being apparently variable and machine specific.
10
11 Another solution would be to delay for a bit more (~70ms) but this is not
12 feasible for two reasons: first of all, we're adding an even bigger delay
13 in a probe function; second, some machines need less, some may need even
14 more, making the msleep at probe solution highly suboptimal.
15
16 This reverts commit 10debf8c2da8011c8009dd4b3f6d0ab85891c81b.
17
18 Fixes: 10debf8c2da8 ("thermal/drivers/mediatek: Add delay after thermal banks initialization")
19 Reported-by: "kernelci.org bot" <bot@kernelci.org>
20 Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
21 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
22 Link: https://lore.kernel.org/r/20230419061146.22246-2-angelogioacchino.delregno@collabora.com
23 ---
24 drivers/thermal/mediatek/auxadc_thermal.c | 11 ++++++++---
25 1 file changed, 8 insertions(+), 3 deletions(-)
26
27 --- a/drivers/thermal/mediatek/auxadc_thermal.c
28 +++ b/drivers/thermal/mediatek/auxadc_thermal.c
29 @@ -816,6 +816,14 @@ static int mtk_thermal_bank_temperature(
30 mt, conf->bank_data[bank->id].sensors[i], raw);
31
32
33 + /*
34 + * The first read of a sensor often contains very high bogus
35 + * temperature value. Filter these out so that the system does
36 + * not immediately shut down.
37 + */
38 + if (temp > 200000)
39 + temp = 0;
40 +
41 if (temp > max)
42 max = temp;
43 }
44 @@ -1273,9 +1281,6 @@ static int mtk_thermal_probe(struct plat
45
46 platform_set_drvdata(pdev, mt);
47
48 - /* Delay for thermal banks to be ready */
49 - msleep(30);
50 -
51 tzdev = devm_thermal_of_zone_register(&pdev->dev, 0, mt,
52 &mtk_thermal_ops);
53 if (IS_ERR(tzdev)) {