1 From c04ade27cb7b952b6b9b9a0efa0a6129cc63f2ae Mon Sep 17 00:00:00 2001
2 From: Maxime Chevallier <maxime.chevallier@bootlin.com>
3 Date: Wed, 17 Aug 2022 14:32:54 +0200
4 Subject: [PATCH] net: phy: Add helper to derive the number of ports from a phy
7 Some phy modes such as QSGMII multiplex several MAC<->PHY links on one
8 single physical interface. QSGMII used to be the only one supported, but
9 other modes such as QUSGMII also carry multiple links.
11 This helper allows getting the number of links that are multiplexed
14 Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
15 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
16 Signed-off-by: David S. Miller <davem@davemloft.net>
18 drivers/net/phy/phy-core.c | 52 ++++++++++++++++++++++++++++++++++++++
19 include/linux/phy.h | 2 ++
20 2 files changed, 54 insertions(+)
22 --- a/drivers/net/phy/phy-core.c
23 +++ b/drivers/net/phy/phy-core.c
24 @@ -74,6 +74,58 @@ const char *phy_duplex_to_str(unsigned i
26 EXPORT_SYMBOL_GPL(phy_duplex_to_str);
29 + * phy_interface_num_ports - Return the number of links that can be carried by
30 + * a given MAC-PHY physical link. Returns 0 if this is
31 + * unknown, the number of links else.
33 + * @interface: The interface mode we want to get the number of ports
35 +int phy_interface_num_ports(phy_interface_t interface)
37 + switch (interface) {
38 + case PHY_INTERFACE_MODE_NA:
40 + case PHY_INTERFACE_MODE_INTERNAL:
41 + case PHY_INTERFACE_MODE_MII:
42 + case PHY_INTERFACE_MODE_GMII:
43 + case PHY_INTERFACE_MODE_TBI:
44 + case PHY_INTERFACE_MODE_REVMII:
45 + case PHY_INTERFACE_MODE_RMII:
46 + case PHY_INTERFACE_MODE_REVRMII:
47 + case PHY_INTERFACE_MODE_RGMII:
48 + case PHY_INTERFACE_MODE_RGMII_ID:
49 + case PHY_INTERFACE_MODE_RGMII_RXID:
50 + case PHY_INTERFACE_MODE_RGMII_TXID:
51 + case PHY_INTERFACE_MODE_RTBI:
52 + case PHY_INTERFACE_MODE_XGMII:
53 + case PHY_INTERFACE_MODE_XLGMII:
54 + case PHY_INTERFACE_MODE_MOCA:
55 + case PHY_INTERFACE_MODE_TRGMII:
56 + case PHY_INTERFACE_MODE_USXGMII:
57 + case PHY_INTERFACE_MODE_SGMII:
58 + case PHY_INTERFACE_MODE_SMII:
59 + case PHY_INTERFACE_MODE_1000BASEX:
60 + case PHY_INTERFACE_MODE_2500BASEX:
61 + case PHY_INTERFACE_MODE_5GBASER:
62 + case PHY_INTERFACE_MODE_10GBASER:
63 + case PHY_INTERFACE_MODE_25GBASER:
64 + case PHY_INTERFACE_MODE_10GKR:
65 + case PHY_INTERFACE_MODE_100BASEX:
66 + case PHY_INTERFACE_MODE_RXAUI:
67 + case PHY_INTERFACE_MODE_XAUI:
69 + case PHY_INTERFACE_MODE_QSGMII:
70 + case PHY_INTERFACE_MODE_QUSGMII:
72 + case PHY_INTERFACE_MODE_MAX:
73 + WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
78 +EXPORT_SYMBOL_GPL(phy_interface_num_ports);
80 /* A mapping of all SUPPORTED settings to speed/duplex. This table
81 * must be grouped by speed and sorted in descending match priority
82 * - iow, descending speed.
83 --- a/include/linux/phy.h
84 +++ b/include/linux/phy.h
85 @@ -964,6 +964,8 @@ struct phy_fixup {
86 const char *phy_speed_to_str(int speed);
87 const char *phy_duplex_to_str(unsigned int duplex);
89 +int phy_interface_num_ports(phy_interface_t interface);
91 /* A structure for mapping a particular speed and duplex
92 * combination to a particular SUPPORTED and ADVERTISED value