affb87b47bc2f09907ce402a5561b05595a1dd73
[openwrt/staging/stintel.git] /
1 From 83800d29f0c578e82554e7d4c6bfdbdf9b6cf428 Mon Sep 17 00:00:00 2001
2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
3 Date: Tue, 16 Nov 2021 10:06:43 +0000
4 Subject: [PATCH] net: mtk_eth_soc: populate supported_interfaces member
5
6 Populate the phy interface mode bitmap for the Mediatek driver with
7 interfaces modes supported by the MAC.
8
9 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
10 Signed-off-by: David S. Miller <davem@davemloft.net>
11 ---
12 drivers/net/ethernet/mediatek/mtk_eth_soc.c | 20 ++++++++++++++++++++
13 1 file changed, 20 insertions(+)
14
15 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
16 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
17 @@ -3361,6 +3361,26 @@ static int mtk_add_mac(struct mtk_eth *e
18
19 mac->phylink_config.dev = &eth->netdev[id]->dev;
20 mac->phylink_config.type = PHYLINK_NETDEV;
21 + __set_bit(PHY_INTERFACE_MODE_MII,
22 + mac->phylink_config.supported_interfaces);
23 + __set_bit(PHY_INTERFACE_MODE_GMII,
24 + mac->phylink_config.supported_interfaces);
25 +
26 + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII))
27 + phy_interface_set_rgmii(mac->phylink_config.supported_interfaces);
28 +
29 + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id)
30 + __set_bit(PHY_INTERFACE_MODE_TRGMII,
31 + mac->phylink_config.supported_interfaces);
32 +
33 + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) {
34 + __set_bit(PHY_INTERFACE_MODE_SGMII,
35 + mac->phylink_config.supported_interfaces);
36 + __set_bit(PHY_INTERFACE_MODE_1000BASEX,
37 + mac->phylink_config.supported_interfaces);
38 + __set_bit(PHY_INTERFACE_MODE_2500BASEX,
39 + mac->phylink_config.supported_interfaces);
40 + }
41
42 phylink = phylink_create(&mac->phylink_config,
43 of_fwnode_handle(mac->of_node),