b28f23f573a012b5e300a346111afcd51303a807
[openwrt/staging/aparcar.git] /
1 From patchwork Tue Dec 10 08:14:39 2019
2 Content-Type: text/plain; charset="utf-8"
3 MIME-Version: 1.0
4 Content-Transfer-Encoding: 7bit
5 X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com>
6 X-Patchwork-Id: 1206955
7 X-Patchwork-Delegate: davem@davemloft.net
8 Return-Path: <netdev-owner@vger.kernel.org>
9 X-Original-To: patchwork-incoming-netdev@ozlabs.org
10 Delivered-To: patchwork-incoming-netdev@ozlabs.org
11 Authentication-Results: ozlabs.org; spf=none (no SPF record)
12 smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;
13 helo=vger.kernel.org;
14 envelope-from=netdev-owner@vger.kernel.org;
15 receiver=<UNKNOWN>)
16 Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none)
17 header.from=mediatek.com
18 Authentication-Results: ozlabs.org; dkim=pass (1024-bit key;
19 unprotected) header.d=mediatek.com header.i=@mediatek.com
20 header.b="SuczJHZp"; dkim-atps=neutral
21 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67])
22 by ozlabs.org (Postfix) with ESMTP id 47XCXj3BBNz9sPh
23 for <patchwork-incoming-netdev@ozlabs.org>;
24 Tue, 10 Dec 2019 19:15:01 +1100 (AEDT)
25 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
26 id S1727133AbfLJIPA (ORCPT
27 <rfc822;patchwork-incoming-netdev@ozlabs.org>);
28 Tue, 10 Dec 2019 03:15:00 -0500
29 Received: from mailgw02.mediatek.com ([210.61.82.184]:45567 "EHLO
30 mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by
31 vger.kernel.org with ESMTP id S1727022AbfLJIO7 (ORCPT
32 <rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:59 -0500
33 X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210
34 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;
35 d=mediatek.com; s=dk;
36 h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;
37 bh=KJqQ2m7z9H4vre+SZyxgKEGRWb9Edp5pJlYnepJNMyM=;
38 b=SuczJHZpeY7vF8UsCGorYUAcT2lEUX2E0ciiyQBS1rDLPzTYnufK8OXyAw5Uq8U1m72TGWYCaq1o0VWtI1meJpEmCL2TVK/d+Y+IaacHlO716BmX77+0MU0crczE8zx1Nz2pNh+GicsB6AoC9qbBU+p5egbKDMBhpRaGQNAeBww=;
39 X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210
40 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by
41 mailgw02.mediatek.com (envelope-from <landen.chao@mediatek.com>)
42 (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)
43 with ESMTP id 297826603; Tue, 10 Dec 2019 16:14:47 +0800
44 Received: from mtkcas08.mediatek.inc (172.21.101.126) by
45 mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server
46 (TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:38 +0800
47 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc
48 (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via
49 Frontend Transport; Tue, 10 Dec 2019 16:14:26 +0800
50 From: Landen Chao <landen.chao@mediatek.com>
51 To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
52 <vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
53 <robh+dt@kernel.org>, <mark.rutland@arm.com>
54 CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
55 <linux-kernel@vger.kernel.org>,
56 <linux-mediatek@lists.infradead.org>, <davem@davemloft.net>,
57 <sean.wang@mediatek.com>, <opensource@vdorst.com>,
58 <frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com>
59 Subject: [PATCH net-next 3/6] dt-bindings: net: dsa: add new MT7531 binding
60 to support MT7531
61 Date: Tue, 10 Dec 2019 16:14:39 +0800
62 Message-ID: <1c382fd916b66bfe3ce8ef18c12f954dbcbddbbc.1575914275.git.landen.chao@mediatek.com>
63 X-Mailer: git-send-email 2.18.0
64 In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com>
65 References: <cover.1575914275.git.landen.chao@mediatek.com>
66 MIME-Version: 1.0
67 X-MTK: N
68 Sender: netdev-owner@vger.kernel.org
69 Precedence: bulk
70 List-ID: <netdev.vger.kernel.org>
71 X-Mailing-List: netdev@vger.kernel.org
72
73 Add devicetree binding to support the compatible mt7531 switch as used
74 in the MediaTek MT7531 switch.
75
76 Signed-off-by: Sean Wang <sean.wang@mediatek.com>
77 Signed-off-by: Landen Chao <landen.chao@mediatek.com>
78 ---
79 .../devicetree/bindings/net/dsa/mt7530.txt | 77 ++++++++++++++++++-
80 1 file changed, 74 insertions(+), 3 deletions(-)
81
82 --- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt
83 +++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt
84 @@ -5,6 +5,7 @@ Required properties:
85
86 - compatible: may be compatible = "mediatek,mt7530"
87 or compatible = "mediatek,mt7621"
88 + or compatible = "mediatek,mt7531"
89 - #address-cells: Must be 1.
90 - #size-cells: Must be 0.
91 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
92 @@ -32,10 +33,13 @@ Required properties for the child nodes
93
94 - reg: Port address described must be 6 for CPU port and from 0 to 5 for
95 user ports.
96 -- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled
97 - "cpu".
98 +- phy-mode: String, the follow value would be acceptable for port labeled "cpu"
99 + If compatible mediatek,mt7530 or mediatek,mt7621 is set,
100 + must be either "trgmii" or "rgmii"
101 + If compatible mediatek,mt7531 is set,
102 + must be either "sgmii", "1000base-x" or "2500base-x"
103
104 -Port 5 of the switch is muxed between:
105 +Port 5 of mt7530 and mt7621 switch is muxed between:
106 1. GMAC5: GMAC5 can interface with another external MAC or PHY.
107 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
108 of the SOC. Used in many setups where port 0/4 becomes the WAN port.
109 @@ -308,3 +312,70 @@ Example 3: MT7621: Port 5 is connected t
110 };
111 };
112 };
113 +
114 +Example 4:
115 +
116 +&eth {
117 + gmac0: mac@0 {
118 + compatible = "mediatek,eth-mac";
119 + reg = <0>;
120 + phy-mode = "2500base-x";
121 +
122 + fixed-link {
123 + speed = <1000>;
124 + full-duplex;
125 + pause;
126 + };
127 + };
128 +
129 + &mdio0 {
130 + switch@0 {
131 + compatible = "mediatek,mt7531";
132 + reg = <0>;
133 + reset-gpios = <&pio 54 0>;
134 +
135 + ports {
136 + #address-cells = <1>;
137 + #size-cells = <0>;
138 + reg = <0>;
139 +
140 + port@0 {
141 + reg = <0>;
142 + label = "lan0";
143 + };
144 +
145 + port@1 {
146 + reg = <1>;
147 + label = "lan1";
148 + };
149 +
150 + port@2 {
151 + reg = <2>;
152 + label = "lan2";
153 + };
154 +
155 + port@3 {
156 + reg = <3>;
157 + label = "lan3";
158 + };
159 +
160 + port@4 {
161 + reg = <4>;
162 + label = "wan";
163 + };
164 +
165 + port@6 {
166 + reg = <6>;
167 + label = "cpu";
168 + ethernet = <&gmac0>;
169 + phy-mode = "2500base-x";
170 +
171 + fixed-link {
172 + speed = <1000>;
173 + full-duplex;
174 + pause;
175 + };
176 + };
177 + };
178 + };
179 + };