b5b66cfc5ac0d1c4560dd3262af4af52207098bf
[openwrt/staging/thess.git] /
1 From 30fd21cfb1e64ef20035559a8246f5fbf682c40e Mon Sep 17 00:00:00 2001
2 From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
3 Date: Sun, 11 Jun 2023 15:03:14 +0100
4 Subject: [PATCH] nvmem: rockchip-otp: Generalize rockchip_otp_wait_status()
5
6 In preparation to support additional Rockchip OTP memory devices with
7 different register layout, generalize rockchip_otp_wait_status() to
8 accept a new parameter for specifying the offset of the status register.
9
10 Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
11 Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
12 Reviewed-by: Heiko Stuebner <heiko@sntech.de>
13 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 Message-ID: <20230611140330.154222-11-srinivas.kandagatla@linaro.org>
15 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
16 ---
17 drivers/nvmem/rockchip-otp.c | 11 ++++++-----
18 1 file changed, 6 insertions(+), 5 deletions(-)
19
20 --- a/drivers/nvmem/rockchip-otp.c
21 +++ b/drivers/nvmem/rockchip-otp.c
22 @@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct roc
23 return 0;
24 }
25
26 -static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag)
27 +static int rockchip_otp_wait_status(struct rockchip_otp *otp,
28 + unsigned int reg, u32 flag)
29 {
30 u32 status = 0;
31 int ret;
32
33 - ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status,
34 + ret = readl_poll_timeout_atomic(otp->base + reg, status,
35 (status & flag), 1, OTPC_TIMEOUT);
36 if (ret)
37 return ret;
38
39 /* clean int status */
40 - writel(flag, otp->base + OTPC_INT_STATUS);
41 + writel(flag, otp->base + reg);
42
43 return 0;
44 }
45 @@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struc
46
47 writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
48
49 - ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
50 + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE);
51 if (ret < 0)
52 dev_err(otp->dev, "timeout during ecc_enable\n");
53
54 @@ -156,7 +157,7 @@ static int px30_otp_read(void *context,
55 otp->base + OTPC_USER_ADDR);
56 writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
57 otp->base + OTPC_USER_ENABLE);
58 - ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
59 + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE);
60 if (ret < 0) {
61 dev_err(otp->dev, "timeout during read setup\n");
62 goto read_end;