b5f287f3c3f87e9b0e96349fe0f03b12a3cf395a
[openwrt/staging/blocktrron.git] /
1 From 432d271f831a8182efa9a6ae9769fb81c32370da Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Tue, 30 May 2023 15:51:48 +0100
4 Subject: [PATCH] bcm2835-dma: Move definition of PROT bits to expected
5 place
6
7 Fixes: 654368fe848c ("bcm2835-dma: Need to keep PROT bits set in CS on 40bit controller")
8
9 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
10 ---
11 drivers/dma/bcm2835-dma.c | 4 ++--
12 1 file changed, 2 insertions(+), 2 deletions(-)
13
14 --- a/drivers/dma/bcm2835-dma.c
15 +++ b/drivers/dma/bcm2835-dma.c
16 @@ -242,6 +242,8 @@ struct bcm2835_desc {
17 #define BCM2711_DMA40_WR_PAUSED BIT(5) /* Writing is paused */
18 #define BCM2711_DMA40_DREQ_PAUSED BIT(6) /* Is paused by DREQ flow control */
19 #define BCM2711_DMA40_WAITING_FOR_WRITES BIT(7) /* Waiting for last write */
20 +// we always want to run in supervisor mode
21 +#define BCM2711_DMA40_PROT (BIT(8)|BIT(9))
22 #define BCM2711_DMA40_ERR BIT(10)
23 #define BCM2711_DMA40_QOS(x) (((x) & 0x1f) << 16)
24 #define BCM2711_DMA40_PANIC_QOS(x) (((x) & 0x1f) << 20)
25 @@ -250,8 +252,6 @@ struct bcm2835_desc {
26 #define BCM2711_DMA40_DISDEBUG BIT(29)
27 #define BCM2711_DMA40_ABORT BIT(30)
28 #define BCM2711_DMA40_HALT BIT(31)
29 -// we always want to run in supervisor mode
30 -#define BCM2711_DMA40_PROT (BIT(8)|BIT(9))
31
32 #define BCM2711_DMA40_CS_FLAGS(x) (x & (BCM2711_DMA40_QOS(15) | \
33 BCM2711_DMA40_PANIC_QOS(15) | \