git.openwrt.org Git - openwrt/staging/thess.git/blob

   1 From patchwork Thu Sep  8 19:33:38 2022
   2 Content-Type: text/plain; charset="utf-8"
   3 MIME-Version: 1.0
   4 Content-Transfer-Encoding: 7bit
   5 X-Patchwork-Submitter: Lorenzo Bianconi <lorenzo@kernel.org>
   6 X-Patchwork-Id: 12970556
   7 X-Patchwork-Delegate: kuba@kernel.org
   8 From: Lorenzo Bianconi <lorenzo@kernel.org>
   9 To: netdev@vger.kernel.org
  10 Cc: nbd@nbd.name, john@phrozen.org, sean.wang@mediatek.com,
  11         Mark-MC.Lee@mediatek.com, davem@davemloft.net, edumazet@google.com,
  12         kuba@kernel.org, pabeni@redhat.com, matthias.bgg@gmail.com,
  13         linux-mediatek@lists.infradead.org, lorenzo.bianconi@redhat.com,
  14         Bo.Jiao@mediatek.com, sujuan.chen@mediatek.com,
  15         ryder.Lee@mediatek.com, evelyn.tsai@mediatek.com,
  16         devicetree@vger.kernel.org, robh@kernel.org
  17 Subject: [PATCH net-next 03/12] net: ethernet: mtk_eth_soc: move gdma_to_ppe
  18  and ppe_base definitions in mtk register map
  19 Date: Thu,  8 Sep 2022 21:33:37 +0200
  20 Message-Id:
  21  <95938fc9cbe0223714be2658a49ca58e9baace00.1662661555.git.lorenzo@kernel.org>
  22 X-Mailer: git-send-email 2.37.3
  23 In-Reply-To: <cover.1662661555.git.lorenzo@kernel.org>
  24 References: <cover.1662661555.git.lorenzo@kernel.org>
  25 MIME-Version: 1.0
  26 Precedence: bulk
  27 List-ID: <netdev.vger.kernel.org>
  28 X-Mailing-List: netdev@vger.kernel.org
  29 X-Patchwork-Delegate: kuba@kernel.org
  30
  31 This is a preliminary patch to introduce mt7986 hw packet engine.
  32
  33 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  34 ---
  35  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 15 +++++++++++----
  36  drivers/net/ethernet/mediatek/mtk_eth_soc.h |  3 ++-
  37  drivers/net/ethernet/mediatek/mtk_ppe.h     |  2 --
  38  3 files changed, 13 insertions(+), 7 deletions(-)
  39
  40 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  41 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  42 @@ -73,6 +73,8 @@ static const struct mtk_reg_map mtk_reg_
  43                 .fq_blen        = 0x1b2c,
  44         },
  45         .gdm1_cnt               = 0x2400,
  46 +       .gdma_to_ppe0           = 0x4444,
  47 +       .ppe_base               = 0x0c00,
  48  };
  49
  50  static const struct mtk_reg_map mt7628_reg_map = {
  51 @@ -126,6 +128,8 @@ static const struct mtk_reg_map mt7986_r
  52                 .fq_blen        = 0x472c,
  53         },
  54         .gdm1_cnt               = 0x1c00,
  55 +       .gdma_to_ppe0           = 0x3333,
  56 +       .ppe_base               = 0x2000,
  57  };
  58
  59  /* strings used by ethtool */
  60 @@ -2927,6 +2931,7 @@ static int mtk_open(struct net_device *d
  61
  62         /* we run 2 netdevs on the same dma ring so we only bring it up once */
  63         if (!refcount_read(&eth->dma_refcnt)) {
  64 +               const struct mtk_soc_data *soc = eth->soc;
  65                 u32 gdm_config = MTK_GDMA_TO_PDMA;
  66                 int err;
  67
  68 @@ -2936,15 +2941,15 @@ static int mtk_open(struct net_device *d
  69                         return err;
  70                 }
  71
  72 -               if (eth->soc->offload_version && mtk_ppe_start(eth->ppe) == 0)
  73 -                       gdm_config = MTK_GDMA_TO_PPE;
  74 +               if (soc->offload_version && mtk_ppe_start(eth->ppe) == 0)
  75 +                       gdm_config = soc->reg_map->gdma_to_ppe0;
  76
  77                 mtk_gdm_config(eth, gdm_config);
  78
  79                 napi_enable(&eth->tx_napi);
  80                 napi_enable(&eth->rx_napi);
  81                 mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
  82 -               mtk_rx_irq_enable(eth, eth->soc->txrx.rx_irq_done_mask);
  83 +               mtk_rx_irq_enable(eth, soc->txrx.rx_irq_done_mask);
  84                 refcount_set(&eth->dma_refcnt, 1);
  85         }
  86         else
  87 @@ -4043,7 +4048,9 @@ static int mtk_probe(struct platform_dev
  88         }
  89
  90         if (eth->soc->offload_version) {
  91 -               eth->ppe = mtk_ppe_init(eth, eth->base + MTK_ETH_PPE_BASE, 2);
  92 +               u32 ppe_addr = eth->soc->reg_map->ppe_base;
  93 +
  94 +               eth->ppe = mtk_ppe_init(eth, eth->base + ppe_addr, 2);
  95                 if (!eth->ppe) {
  96                         err = -ENOMEM;
  97                         goto err_free_dev;
  98 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
  99 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 100 @@ -105,7 +105,6 @@
 101  #define MTK_GDMA_TCS_EN                BIT(21)
 102  #define MTK_GDMA_UCS_EN                BIT(20)
 103  #define MTK_GDMA_TO_PDMA       0x0
 104 -#define MTK_GDMA_TO_PPE                0x4444
 105  #define MTK_GDMA_DROP_ALL       0x7777
 106
 107  /* Unicast Filter MAC Address Register - Low */
 108 @@ -953,6 +952,8 @@ struct mtk_reg_map {
 109                 u32     fq_blen;        /* fq free page buffer length */
 110         } qdma;
 111         u32     gdm1_cnt;
 112 +       u32     gdma_to_ppe0;
 113 +       u32     ppe_base;
 114  };
 115
 116  /* struct mtk_eth_data -       This is the structure holding all differences
 117 --- a/drivers/net/ethernet/mediatek/mtk_ppe.h
 118 +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
 119 @@ -8,8 +8,6 @@
 120  #include <linux/bitfield.h>
 121  #include <linux/rhashtable.h>
 122
 123 -#define MTK_ETH_PPE_BASE               0xc00
 124 -
 125  #define MTK_PPE_ENTRIES_SHIFT          3
 126  #define MTK_PPE_ENTRIES                        (1024 << MTK_PPE_ENTRIES_SHIFT)
 127  #define MTK_PPE_HASH_MASK              (MTK_PPE_ENTRIES - 1)