git.openwrt.org Git - openwrt/staging/nbd.git/blob

   1 From 7d5fcedd45e066db0d2735a753a86af31ba44722 Mon Sep 17 00:00:00 2001
   2 From: Ran Wang <ran.wang_1@nxp.com>
   3 Date: Wed, 29 May 2019 16:18:06 +0800
   4 Subject: [PATCH] sdk: dts: ls1046frwy move dma-coherent from soc to its child
   5  nodes
   6
   7 Since SMMU is not supported for SDK version, USB function will down if
   8 still apply property 'dma-coherent' in scope of soc (USB driver is not
   9 ready to support it alone) in SDK device trees, decide to remove it.
  10 And add dma-coherent on other non-USB child nodes under soc.
  11
  12 Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
  13 ---
  14  .../boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts    | 174 +++++++++++++++++++++
  15  .../boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts |   4 +
  16  2 files changed, 178 insertions(+)
  17
  18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts
  19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts
  20 @@ -24,6 +24,8 @@
  21  };
  22
  23  &soc {
  24 +/delete-property/ dma-coherent;
  25 +
  26  #include "qoriq-dpaa-eth.dtsi"
  27  #include "qoriq-fman3-0-6oh.dtsi"
  28
  29 @@ -65,3 +67,175 @@
  30  &fman0 {
  31         compatible = "fsl,fman", "simple-bus";
  32  };
  33 +
  34 +&clockgen {
  35 +       dma-coherent;
  36 +};
  37 +
  38 +&scfg {
  39 +       dma-coherent;
  40 +};
  41 +
  42 +&crypto {
  43 +       dma-coherent;
  44 +};
  45 +
  46 +&dcfg {
  47 +       dma-coherent;
  48 +};
  49 +
  50 +&ifc {
  51 +       dma-coherent;
  52 +};
  53 +
  54 +&qspi {
  55 +       dma-coherent;
  56 +};
  57 +
  58 +&esdhc {
  59 +       dma-coherent;
  60 +};
  61 +
  62 +&ddr {
  63 +       dma-coherent;
  64 +};
  65 +
  66 +&tmu {
  67 +       dma-coherent;
  68 +};
  69 +
  70 +&qman {
  71 +       dma-coherent;
  72 +};
  73 +
  74 +&bman {
  75 +       dma-coherent;
  76 +};
  77 +
  78 +&bportals {
  79 +       dma-coherent;
  80 +};
  81 +
  82 +&qportals {
  83 +       dma-coherent;
  84 +};
  85 +
  86 +&dspi {
  87 +       dma-coherent;
  88 +};
  89 +
  90 +&i2c0 {
  91 +       dma-coherent;
  92 +};
  93 +
  94 +&i2c1 {
  95 +       dma-coherent;
  96 +};
  97 +
  98 +&i2c2 {
  99 +       dma-coherent;
 100 +};
 101 +
 102 +&i2c3 {
 103 +       dma-coherent;
 104 +};
 105 +
 106 +&duart0 {
 107 +       dma-coherent;
 108 +};
 109 +
 110 +&duart1 {
 111 +       dma-coherent;
 112 +};
 113 +
 114 +&duart2 {
 115 +       dma-coherent;
 116 +};
 117 +
 118 +&duart3 {
 119 +       dma-coherent;
 120 +};
 121 +
 122 +&gpio0 {
 123 +       dma-coherent;
 124 +};
 125 +
 126 +&gpio1 {
 127 +       dma-coherent;
 128 +};
 129 +
 130 +&gpio2 {
 131 +       dma-coherent;
 132 +};
 133 +
 134 +&gpio3 {
 135 +       dma-coherent;
 136 +};
 137 +
 138 +&lpuart0 {
 139 +       dma-coherent;
 140 +};
 141 +
 142 +&lpuart1 {
 143 +       dma-coherent;
 144 +};
 145 +
 146 +&lpuart2 {
 147 +       dma-coherent;
 148 +};
 149 +
 150 +&lpuart3 {
 151 +       dma-coherent;
 152 +};
 153 +
 154 +&lpuart4 {
 155 +       dma-coherent;
 156 +};
 157 +
 158 +&lpuart5 {
 159 +       dma-coherent;
 160 +};
 161 +
 162 +&ftm0 {
 163 +       dma-coherent;
 164 +};
 165 +
 166 +&wdog0 {
 167 +       dma-coherent;
 168 +};
 169 +
 170 +&edma0 {
 171 +       dma-coherent;
 172 +};
 173 +
 174 +&sata {
 175 +       dma-coherent;
 176 +};
 177 +
 178 +&qdma {
 179 +       dma-coherent;
 180 +};
 181 +
 182 +&msi1 {
 183 +       dma-coherent;
 184 +};
 185 +
 186 +&msi2 {
 187 +       dma-coherent;
 188 +};
 189 +
 190 +&msi3 {
 191 +       dma-coherent;
 192 +};
 193 +
 194 +&fman0 {
 195 +       dma-coherent;
 196 +};
 197 +
 198 +&ptp_timer0 {
 199 +       dma-coherent;
 200 +};
 201 +
 202 +&fsldpaa {
 203 +       dma-coherent;
 204 +};
 205 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts
 206 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts
 207 @@ -14,6 +14,7 @@
 208                 fsl,bpid = <7>;
 209                 fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
 210                 fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
 211 +               dma-coherent;
 212         };
 213
 214         bp8: buffer-pool@8 {
 215 @@ -21,6 +22,7 @@
 216                 fsl,bpid = <8>;
 217                 fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
 218                 fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
 219 +               dma-coherent;
 220         };
 221
 222         bp9: buffer-pool@9 {
 223 @@ -28,10 +30,12 @@
 224                 fsl,bpid = <9>;
 225                 fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
 226                 fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
 227 +               dma-coherent;
 228         };
 229
 230         fsl,dpaa {
 231                 compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
 232 +               dma-coherent;
 233
 234                 ethernet@0 {
 235                         compatible = "fsl,dpa-ethernet-init";