d0180a65ba69307ad92ea83663ef1e1fb909c0ae
[openwrt/staging/blocktrron.git] /
1 From 19b934ce3763c9465c5c80302f7c142d30b75869 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Fri, 28 Oct 2022 14:13:30 +0100
4 Subject: [PATCH] dt-bindings: pinctrl: Add bindings for Raspberry Pi RP1
5
6 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
7 ---
8 include/dt-bindings/pinctrl/rp1.h | 46 +++++++++++++++++++++++++++++++
9 1 file changed, 46 insertions(+)
10 create mode 100644 include/dt-bindings/pinctrl/rp1.h
11
12 --- /dev/null
13 +++ b/include/dt-bindings/pinctrl/rp1.h
14 @@ -0,0 +1,46 @@
15 +/* SPDX-License-Identifier: GPL-2.0 */
16 +/*
17 + * Header providing constants for RP1 pinctrl bindings.
18 + *
19 + * Copyright (C) 2019-2022 Raspberry Pi Ltd.
20 + */
21 +
22 +#ifndef __DT_BINDINGS_PINCTRL_RP1_H__
23 +#define __DT_BINDINGS_PINCTRL_RP1_H__
24 +
25 +/* brcm,function property */
26 +#define RP1_FSEL_GPIO_IN 0
27 +#define RP1_FSEL_GPIO_OUT 1
28 +#define RP1_FSEL_ALT0_LEGACY 4
29 +#define RP1_FSEL_ALT1_LEGACY 5
30 +#define RP1_FSEL_ALT2_LEGACY 6
31 +#define RP1_FSEL_ALT3_LEGACY 7
32 +#define RP1_FSEL_ALT4_LEGACY 3
33 +#define RP1_FSEL_ALT5_LEGACY 2
34 +#define RP1_FSEL_ALT0 0x08
35 +#define RP1_FSEL_ALT0INV 0x09
36 +#define RP1_FSEL_ALT1 0x0a
37 +#define RP1_FSEL_ALT1INV 0x0b
38 +#define RP1_FSEL_ALT2 0x0c
39 +#define RP1_FSEL_ALT2INV 0x0d
40 +#define RP1_FSEL_ALT3 0x0e
41 +#define RP1_FSEL_ALT3INV 0x0f
42 +#define RP1_FSEL_ALT4 0x10
43 +#define RP1_FSEL_ALT4INV 0x11
44 +#define RP1_FSEL_ALT5 0x12
45 +#define RP1_FSEL_ALT5INV 0x13
46 +#define RP1_FSEL_ALT6 0x14
47 +#define RP1_FSEL_ALT6INV 0x15
48 +#define RP1_FSEL_ALT7 0x16
49 +#define RP1_FSEL_ALT7INV 0x17
50 +#define RP1_FSEL_ALT8 0x18
51 +#define RP1_FSEL_ALT8INV 0x19
52 +#define RP1_FSEL_NONE 0x1a
53 +
54 +/* brcm,pull property */
55 +#define RP1_PUD_OFF 0
56 +#define RP1_PUD_DOWN 1
57 +#define RP1_PUD_UP 2
58 +#define RP1_PUD_KEEP 3
59 +
60 +#endif /* __DT_BINDINGS_PINCTRL_RP1_H__ */