d97bb715e0f3d534ef9543275b1528a4506d699c
[openwrt/staging/ldir.git] /
1 From: Lorenzo Bianconi <lorenzo@kernel.org>
2 Date: Thu, 24 Nov 2022 16:22:51 +0100
3 Subject: [PATCH] net: ethernet: mtk_wed: return status value in
4 mtk_wdma_rx_reset
5
6 Move MTK_WDMA_RESET_IDX configuration in mtk_wdma_rx_reset routine.
7 Increase poll timeout to 10ms in order to be aligned with vendor sdk.
8 This is a preliminary patch to add Wireless Ethernet Dispatcher reset
9 support.
10
11 Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
12 Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
13 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
14 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
15 ---
16
17 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
18 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
19 @@ -101,17 +101,21 @@ mtk_wdma_read_reset(struct mtk_wed_devic
20 return wdma_r32(dev, MTK_WDMA_GLO_CFG);
21 }
22
23 -static void
24 +static int
25 mtk_wdma_rx_reset(struct mtk_wed_device *dev)
26 {
27 u32 status, mask = MTK_WDMA_GLO_CFG_RX_DMA_BUSY;
28 - int i;
29 + int i, ret;
30
31 wdma_clr(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_RX_DMA_EN);
32 - if (readx_poll_timeout(mtk_wdma_read_reset, dev, status,
33 - !(status & mask), 0, 1000))
34 + ret = readx_poll_timeout(mtk_wdma_read_reset, dev, status,
35 + !(status & mask), 0, 10000);
36 + if (ret)
37 dev_err(dev->hw->dev, "rx reset failed\n");
38
39 + wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX);
40 + wdma_w32(dev, MTK_WDMA_RESET_IDX, 0);
41 +
42 for (i = 0; i < ARRAY_SIZE(dev->rx_wdma); i++) {
43 if (dev->rx_wdma[i].desc)
44 continue;
45 @@ -119,6 +123,8 @@ mtk_wdma_rx_reset(struct mtk_wed_device
46 wdma_w32(dev,
47 MTK_WDMA_RING_RX(i) + MTK_WED_RING_OFS_CPU_IDX, 0);
48 }
49 +
50 + return ret;
51 }
52
53 static void
54 @@ -565,9 +571,7 @@ mtk_wed_detach(struct mtk_wed_device *de
55
56 mtk_wed_stop(dev);
57
58 - wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX);
59 - wdma_w32(dev, MTK_WDMA_RESET_IDX, 0);
60 -
61 + mtk_wdma_rx_reset(dev);
62 mtk_wed_reset(dev, MTK_WED_RESET_WED);
63 if (mtk_wed_get_rx_capa(dev)) {
64 wdma_clr(dev, MTK_WDMA_GLO_CFG, MTK_WDMA_GLO_CFG_TX_DMA_EN);
65 @@ -582,7 +586,6 @@ mtk_wed_detach(struct mtk_wed_device *de
66 mtk_wed_wo_reset(dev);
67 mtk_wed_free_rx_rings(dev);
68 mtk_wed_wo_deinit(hw);
69 - mtk_wdma_rx_reset(dev);
70 }
71
72 if (dev->wlan.bus_type == MTK_WED_BUS_PCIE) {
73 @@ -1006,11 +1009,7 @@ mtk_wed_reset_dma(struct mtk_wed_device
74 wed_w32(dev, MTK_WED_RESET_IDX, 0);
75 }
76
77 - wdma_w32(dev, MTK_WDMA_RESET_IDX, MTK_WDMA_RESET_IDX_RX);
78 - wdma_w32(dev, MTK_WDMA_RESET_IDX, 0);
79 -
80 - if (mtk_wed_get_rx_capa(dev))
81 - mtk_wdma_rx_reset(dev);
82 + mtk_wdma_rx_reset(dev);
83
84 if (busy) {
85 mtk_wed_reset(dev, MTK_WED_RESET_WDMA_INT_AGENT);