git.openwrt.org Git - openwrt/staging/jow.git/blob

   1 From 954b81b93de3cc6baa9e2ebdd4e8dc7b63dab71a Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.org>
   3 Date: Thu, 16 Nov 2017 14:22:30 +0000
   4 Subject: [PATCH 181/454] drm/vc4: Use .pixel_order instead of custom
   5  .flip_cbcr
   6
   7 The hardware has enums for altering the Cr and Cb order,
   8 so use this instead of having a flag which swaps the
   9 order the pointers are presented to the hardware
  10 (that only worked for 3 plane formats anyway).
  11
  12 Explicitly sets .pixel_order in each case, rather than
  13 relying on then default XYCBCR order being a value 0.
  14
  15 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
  16 Signed-off-by: Eric Anholt <eric@anholt.net>
  17 Reviewed-by: Eric Anholt <eric@anholt.net>
  18 Link: https://patchwork.freedesktop.org/patch/msgid/563872b69c1e5df142cb15ebfca7f20056b8a64c.1510841336.git.dave.stevenson@raspberrypi.org
  19 (cherry picked from commit 090cb0c690183be849e2bfa0427220f1e435fa30)
  20 ---
  21  drivers/gpu/drm/vc4/vc4_plane.c | 20 ++++++++------------
  22  1 file changed, 8 insertions(+), 12 deletions(-)
  23
  24 --- a/drivers/gpu/drm/vc4/vc4_plane.c
  25 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
  26 @@ -86,7 +86,6 @@ static const struct hvs_format {
  27         u32 hvs; /* HVS_FORMAT_* */
  28         u32 pixel_order;
  29         bool has_alpha;
  30 -       bool flip_cbcr;
  31  } hvs_formats[] = {
  32         {
  33                 .drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
  34 @@ -131,28 +130,32 @@ static const struct hvs_format {
  35         {
  36                 .drm = DRM_FORMAT_YUV422,
  37                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
  38 +               .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
  39         },
  40         {
  41                 .drm = DRM_FORMAT_YVU422,
  42                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
  43 -               .flip_cbcr = true,
  44 +               .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
  45         },
  46         {
  47                 .drm = DRM_FORMAT_YUV420,
  48                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
  49 +               .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
  50         },
  51         {
  52                 .drm = DRM_FORMAT_YVU420,
  53                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
  54 -               .flip_cbcr = true,
  55 +               .pixel_order = HVS_PIXEL_ORDER_XYCRCB,
  56         },
  57         {
  58                 .drm = DRM_FORMAT_NV12,
  59                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
  60 +               .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
  61         },
  62         {
  63                 .drm = DRM_FORMAT_NV16,
  64                 .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
  65 +               .pixel_order = HVS_PIXEL_ORDER_XYCBCR,
  66         },
  67  };
  68
  69 @@ -627,15 +630,8 @@ static int vc4_plane_mode_set(struct drm
  70          * The pointers may be any byte address.
  71          */
  72         vc4_state->ptr0_offset = vc4_state->dlist_count;
  73 -       if (!format->flip_cbcr) {
  74 -               for (i = 0; i < num_planes; i++)
  75 -                       vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
  76 -       } else {
  77 -               WARN_ON_ONCE(num_planes != 3);
  78 -               vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
  79 -               vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
  80 -               vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
  81 -       }
  82 +       for (i = 0; i < num_planes; i++)
  83 +               vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
  84
  85         /* Pointer Context Word 0/1/2: Written by the HVS */
  86         for (i = 0; i < num_planes; i++)