git.openwrt.org Git - openwrt/staging/svanheule.git/blob

   1 From: Lorenzo Bianconi <lorenzo@kernel.org>
   2 Date: Mon, 11 Apr 2022 12:13:25 +0200
   3 Subject: [PATCH] net: ethernet: mtk_eth_soc: use standard property for
   4  cci-control-port
   5
   6 Rely on standard cci-control-port property to identify CCI port
   7 reference.
   8 Update mt7622 dts binding.
   9
  10 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  11 Signed-off-by: David S. Miller <davem@davemloft.net>
  12 ---
  13
  14 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
  15 +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
  16 @@ -962,7 +962,7 @@
  17                 power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
  18                 mediatek,ethsys = <&ethsys>;
  19                 mediatek,sgmiisys = <&sgmiisys>;
  20 -               mediatek,cci-control = <&cci_control2>;
  21 +               cci-control-port = <&cci_control2>;
  22                 mediatek,wed = <&wed0>, <&wed1>;
  23                 mediatek,pcie-mirror = <&pcie_mirror>;
  24                 mediatek,hifsys = <&hifsys>;
  25 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  26 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  27 @@ -3168,7 +3168,7 @@ static int mtk_probe(struct platform_dev
  28                 struct regmap *cci;
  29
  30                 cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
  31 -                                                     "mediatek,cci-control");
  32 +                                                     "cci-control-port");
  33                 /* enable CPU/bus coherency */
  34                 if (!IS_ERR(cci))
  35                         regmap_write(cci, 0, 3);