git.openwrt.org Git - openwrt/staging/blocktrron.git/blob

   1 From cef945452c8468efce75ba0dc8420510a5b84af9 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
   3 Date: Mon, 29 May 2023 10:02:45 +0200
   4 Subject: [PATCH 5/6] net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to
   5  port_max_speed_mode
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Some switches families have minor differences on supported link speed for
  11 ports. Instead of redefining a new port_max_speed_mode for each different
  12 configuration, allow to pass mv88e6xxx_chip structure to allow
  13 differentiating those chips by known chip id
  14
  15 Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
  16 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
  17 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  18 ---
  19  drivers/net/dsa/mv88e6xxx/chip.c |  2 +-
  20  drivers/net/dsa/mv88e6xxx/chip.h |  3 ++-
  21  drivers/net/dsa/mv88e6xxx/port.c | 12 ++++++++----
  22  drivers/net/dsa/mv88e6xxx/port.h | 12 ++++++++----
  23  4 files changed, 19 insertions(+), 10 deletions(-)
  24
  25 --- a/drivers/net/dsa/mv88e6xxx/chip.c
  26 +++ b/drivers/net/dsa/mv88e6xxx/chip.c
  27 @@ -3350,7 +3350,7 @@ static int mv88e6xxx_setup_port(struct m
  28                 caps = pl_config.mac_capabilities;
  29
  30                 if (chip->info->ops->port_max_speed_mode)
  31 -                       mode = chip->info->ops->port_max_speed_mode(port);
  32 +                       mode = chip->info->ops->port_max_speed_mode(chip, port);
  33                 else
  34                         mode = PHY_INTERFACE_MODE_NA;
  35
  36 --- a/drivers/net/dsa/mv88e6xxx/chip.h
  37 +++ b/drivers/net/dsa/mv88e6xxx/chip.h
  38 @@ -514,7 +514,8 @@ struct mv88e6xxx_ops {
  39                                      int speed, int duplex);
  40
  41         /* What interface mode should be used for maximum speed? */
  42 -       phy_interface_t (*port_max_speed_mode)(int port);
  43 +       phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
  44 +                                              int port);
  45
  46         int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
  47
  48 --- a/drivers/net/dsa/mv88e6xxx/port.c
  49 +++ b/drivers/net/dsa/mv88e6xxx/port.c
  50 @@ -342,7 +342,8 @@ int mv88e6341_port_set_speed_duplex(stru
  51                                                duplex);
  52  }
  53
  54 -phy_interface_t mv88e6341_port_max_speed_mode(int port)
  55 +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  56 +                                             int port)
  57  {
  58         if (port == 5)
  59                 return PHY_INTERFACE_MODE_2500BASEX;
  60 @@ -381,7 +382,8 @@ int mv88e6390_port_set_speed_duplex(stru
  61                                                duplex);
  62  }
  63
  64 -phy_interface_t mv88e6390_port_max_speed_mode(int port)
  65 +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  66 +                                             int port)
  67  {
  68         if (port == 9 || port == 10)
  69                 return PHY_INTERFACE_MODE_2500BASEX;
  70 @@ -403,7 +405,8 @@ int mv88e6390x_port_set_speed_duplex(str
  71                                                duplex);
  72  }
  73
  74 -phy_interface_t mv88e6390x_port_max_speed_mode(int port)
  75 +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  76 +                                              int port)
  77  {
  78         if (port == 9 || port == 10)
  79                 return PHY_INTERFACE_MODE_XAUI;
  80 @@ -500,7 +503,8 @@ int mv88e6393x_port_set_speed_duplex(str
  81         return 0;
  82  }
  83
  84 -phy_interface_t mv88e6393x_port_max_speed_mode(int port)
  85 +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
  86 +                                              int port)
  87  {
  88         if (port == 0 || port == 9 || port == 10)
  89                 return PHY_INTERFACE_MODE_10GBASER;
  90 --- a/drivers/net/dsa/mv88e6xxx/port.h
  91 +++ b/drivers/net/dsa/mv88e6xxx/port.h
  92 @@ -359,10 +359,14 @@ int mv88e6390x_port_set_speed_duplex(str
  93  int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
  94                                      int speed, int duplex);
  95
  96 -phy_interface_t mv88e6341_port_max_speed_mode(int port);
  97 -phy_interface_t mv88e6390_port_max_speed_mode(int port);
  98 -phy_interface_t mv88e6390x_port_max_speed_mode(int port);
  99 -phy_interface_t mv88e6393x_port_max_speed_mode(int port);
 100 +phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
 101 +                                             int port);
 102 +phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
 103 +                                             int port);
 104 +phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
 105 +                                              int port);
 106 +phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
 107 +                                              int port);
 108
 109  int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
 110