efb0d8b64fb3ba8ff1c1d8a1dd4248713c9758f4
[openwrt/staging/blocktrron.git] /
1 From 05aaa7fdb0736262e224369b9b9f1410320fc71b Mon Sep 17 00:00:00 2001
2 From: Balsam CHIHI <bchihi@baylibre.com>
3 Date: Tue, 7 Mar 2023 16:45:21 +0100
4 Subject: [PATCH] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal
5 controllers for mt8195
6
7 Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195.
8
9 Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
10 Acked-by: Rob Herring <robh@kernel.org>
11 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
12 Tested-by: Chen-Yu Tsai <wenst@chromium.org>
13 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
14 Link: https://lore.kernel.org/r/20230307154524.118541-2-bchihi@baylibre.com
15 ---
16 include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++
17 1 file changed, 10 insertions(+)
18
19 --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
20 +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
21 @@ -16,4 +16,14 @@
22 #define MT8195_MCU_LITTLE_CPU2 6
23 #define MT8195_MCU_LITTLE_CPU3 7
24
25 +#define MT8195_AP_VPU0 8
26 +#define MT8195_AP_VPU1 9
27 +#define MT8195_AP_GPU0 10
28 +#define MT8195_AP_GPU1 11
29 +#define MT8195_AP_VDEC 12
30 +#define MT8195_AP_IMG 13
31 +#define MT8195_AP_INFRA 14
32 +#define MT8195_AP_CAM0 15
33 +#define MT8195_AP_CAM1 16
34 +
35 #endif /* __MEDIATEK_LVTS_DT_H */