f2fce43e5e03eb97db5a42599f23ab95e1476e82
[openwrt/staging/neocturne.git] /
1 From a19df563230af392f2e84e57d69367f96b4a8c56 Mon Sep 17 00:00:00 2001
2 From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
3 Date: Tue, 12 Jul 2022 16:42:43 +0200
4 Subject: [PATCH] arm64: dts: qcom: align SDHCI reg-names with DT schema
5
6 DT schema requires SDHCI reg names to be hc/core without "_mem" suffix,
7 just like TXT bindings were expecting before the conversion.
8
9 Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
10 Reviewed-by: Douglas Anderson <dianders@chromium.org>
11 Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
12 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 Link: https://lore.kernel.org/r/20220712144245.17417-4-krzysztof.kozlowski@linaro.org
14 ---
15 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +-
16 1 file changed, 1 insertion(+), 1 deletion(-)
17
18 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
19 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
20 @@ -384,7 +384,7 @@
21 sdhc_1: mmc@7824900 {
22 compatible = "qcom,sdhci-msm-v4";
23 reg = <0x7824900 0x500>, <0x7824000 0x800>;
24 - reg-names = "hc_mem", "core_mem";
25 + reg-names = "hc", "core";
26
27 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
28 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;