f5206bba00b39ccb4ff777611573465d64cdb5e1
[openwrt/staging/blocktrron.git] /
1 From: Lorenzo Bianconi <lorenzo@kernel.org>
2 Date: Fri, 20 May 2022 20:11:28 +0200
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: add txd_size to mtk_soc_data
4
5 In order to remove mtk_tx_dma size dependency, introduce txd_size in
6 mtk_soc_data data structure. Rely on txd_size in mtk_init_fq_dma() and
7 mtk_dma_free() routines.
8 This is a preliminary patch to add mt7986 ethernet support.
9
10 Tested-by: Sam Shih <sam.shih@mediatek.com>
11 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
12 Signed-off-by: David S. Miller <davem@davemloft.net>
13 ---
14
15 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
16 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
17 @@ -838,20 +838,20 @@ static void *mtk_max_lro_buf_alloc(gfp_t
18 /* the qdma core needs scratch memory to be setup */
19 static int mtk_init_fq_dma(struct mtk_eth *eth)
20 {
21 + const struct mtk_soc_data *soc = eth->soc;
22 dma_addr_t phy_ring_tail;
23 int cnt = MTK_DMA_SIZE;
24 dma_addr_t dma_addr;
25 int i;
26
27 eth->scratch_ring = dma_alloc_coherent(eth->dma_dev,
28 - cnt * sizeof(struct mtk_tx_dma),
29 + cnt * soc->txrx.txd_size,
30 &eth->phy_scratch_ring,
31 GFP_KERNEL);
32 if (unlikely(!eth->scratch_ring))
33 return -ENOMEM;
34
35 - eth->scratch_head = kcalloc(cnt, MTK_QDMA_PAGE_SIZE,
36 - GFP_KERNEL);
37 + eth->scratch_head = kcalloc(cnt, MTK_QDMA_PAGE_SIZE, GFP_KERNEL);
38 if (unlikely(!eth->scratch_head))
39 return -ENOMEM;
40
41 @@ -861,16 +861,19 @@ static int mtk_init_fq_dma(struct mtk_et
42 if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
43 return -ENOMEM;
44
45 - phy_ring_tail = eth->phy_scratch_ring +
46 - (sizeof(struct mtk_tx_dma) * (cnt - 1));
47 + phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
48
49 for (i = 0; i < cnt; i++) {
50 - eth->scratch_ring[i].txd1 =
51 - (dma_addr + (i * MTK_QDMA_PAGE_SIZE));
52 + struct mtk_tx_dma *txd;
53 +
54 + txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
55 + txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
56 if (i < cnt - 1)
57 - eth->scratch_ring[i].txd2 = (eth->phy_scratch_ring +
58 - ((i + 1) * sizeof(struct mtk_tx_dma)));
59 - eth->scratch_ring[i].txd3 = TX_DMA_SDL(MTK_QDMA_PAGE_SIZE);
60 + txd->txd2 = eth->phy_scratch_ring +
61 + (i + 1) * soc->txrx.txd_size;
62 +
63 + txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
64 + txd->txd4 = 0;
65 }
66
67 mtk_w32(eth, eth->phy_scratch_ring, MTK_QDMA_FQ_HEAD);
68 @@ -2170,6 +2173,7 @@ static int mtk_dma_init(struct mtk_eth *
69
70 static void mtk_dma_free(struct mtk_eth *eth)
71 {
72 + const struct mtk_soc_data *soc = eth->soc;
73 int i;
74
75 for (i = 0; i < MTK_MAC_COUNT; i++)
76 @@ -2177,9 +2181,8 @@ static void mtk_dma_free(struct mtk_eth
77 netdev_reset_queue(eth->netdev[i]);
78 if (eth->scratch_ring) {
79 dma_free_coherent(eth->dma_dev,
80 - MTK_DMA_SIZE * sizeof(struct mtk_tx_dma),
81 - eth->scratch_ring,
82 - eth->phy_scratch_ring);
83 + MTK_DMA_SIZE * soc->txrx.txd_size,
84 + eth->scratch_ring, eth->phy_scratch_ring);
85 eth->scratch_ring = NULL;
86 eth->phy_scratch_ring = 0;
87 }
88 @@ -3391,6 +3394,9 @@ static const struct mtk_soc_data mt2701_
89 .hw_features = MTK_HW_FEATURES,
90 .required_clks = MT7623_CLKS_BITMAP,
91 .required_pctl = true,
92 + .txrx = {
93 + .txd_size = sizeof(struct mtk_tx_dma),
94 + },
95 };
96
97 static const struct mtk_soc_data mt7621_data = {
98 @@ -3399,6 +3405,9 @@ static const struct mtk_soc_data mt7621_
99 .required_clks = MT7621_CLKS_BITMAP,
100 .required_pctl = false,
101 .offload_version = 2,
102 + .txrx = {
103 + .txd_size = sizeof(struct mtk_tx_dma),
104 + },
105 };
106
107 static const struct mtk_soc_data mt7622_data = {
108 @@ -3408,6 +3417,9 @@ static const struct mtk_soc_data mt7622_
109 .required_clks = MT7622_CLKS_BITMAP,
110 .required_pctl = false,
111 .offload_version = 2,
112 + .txrx = {
113 + .txd_size = sizeof(struct mtk_tx_dma),
114 + },
115 };
116
117 static const struct mtk_soc_data mt7623_data = {
118 @@ -3416,6 +3428,9 @@ static const struct mtk_soc_data mt7623_
119 .required_clks = MT7623_CLKS_BITMAP,
120 .required_pctl = true,
121 .offload_version = 2,
122 + .txrx = {
123 + .txd_size = sizeof(struct mtk_tx_dma),
124 + },
125 };
126
127 static const struct mtk_soc_data mt7629_data = {
128 @@ -3424,6 +3439,9 @@ static const struct mtk_soc_data mt7629_
129 .hw_features = MTK_HW_FEATURES,
130 .required_clks = MT7629_CLKS_BITMAP,
131 .required_pctl = false,
132 + .txrx = {
133 + .txd_size = sizeof(struct mtk_tx_dma),
134 + },
135 };
136
137 static const struct mtk_soc_data rt5350_data = {
138 @@ -3431,6 +3449,9 @@ static const struct mtk_soc_data rt5350_
139 .hw_features = MTK_HW_FEATURES_MT7628,
140 .required_clks = MT7628_CLKS_BITMAP,
141 .required_pctl = false,
142 + .txrx = {
143 + .txd_size = sizeof(struct mtk_tx_dma),
144 + },
145 };
146
147 const struct of_device_id of_mtk_match[] = {
148 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
149 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
150 @@ -864,6 +864,7 @@ struct mtk_tx_dma_desc_info {
151 * the target SoC
152 * @required_pctl A bool value to show whether the SoC requires
153 * the extra setup for those pins used by GMAC.
154 + * @txd_size Tx DMA descriptor size.
155 */
156 struct mtk_soc_data {
157 u32 ana_rgc3;
158 @@ -872,6 +873,9 @@ struct mtk_soc_data {
159 bool required_pctl;
160 u8 offload_version;
161 netdev_features_t hw_features;
162 + struct {
163 + u32 txd_size;
164 + } txrx;
165 };
166
167 /* currently no SoC has more than 2 macs */