MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields
authorPaul Burton <paul.burton@imgtec.com>
Tue, 22 Sep 2015 18:42:52 +0000 (11:42 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 11 Nov 2015 07:35:36 +0000 (08:35 +0100)
commit00bf1c691d082c1945fdba032c03a9a82e9e7e61
treea4cb2be39aa6202eda8a0a97df2fe7eb24439ce0
parentc6956728c76d35f2314dd54a74680360760cc2fd
MIPS: tlbex: Avoid placing software PTE bits in Entry* PFN fields

Commit 748e787eb6de ("MIPS: Optimize TLB refill for RI/XI
configurations.") stopped explicitly clearing the bits used by software
in PTEs by making use of a rotate instruction that rotates them into the
fill bits of the Entry{Lo,Hi} register. This can only work if there are
actually enough fill bits in the register to cover the software
maintained bits, otherwise we end up writing those bits into the upper
bits of the PFN or PFNX field of the Entry{Lo,Hi} register.

Fix this by detecting the number of fill bits present in the
Entry{Lo,Hi} registers & explicitly clearing the software bits where
necessary.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11218/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/tlbex.c