ravb: fix race updating TCCR
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Thu, 16 Jul 2015 21:28:38 +0000 (00:28 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 21 Jul 2015 03:42:02 +0000 (20:42 -0700)
commit06613e38f1f2b098d46e9549756c0d5c040f2ef8
treed0df3b2e38679b11a188903b809e360a0a05a6f6
parent194ac06e39238685abc0eeb436efa82e6571b90f
ravb: fix race updating TCCR

The TCCR.TSRQn bit may get clearead after TCCR gets read, so that TCCR write
would get skipped. We don't need to check this bit before setting.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/ravb_main.c