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(parent: 63bd0f1) | patch
phy: Update PHY power control sequence
authorCan Guo <cang@codeaurora.org>
Fri, 21 Sep 2018 04:27:54 +0000 (21:27 -0700)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 25 Sep 2018 10:40:13 +0000 (16:10 +0530)
commit0d58280cf1e61b06cb4d4aab672efccdc28794f6
tree134bca1e03b7b96c654d444980213e18947edc7ctree | snapshot
parent63bd0f19226dea7c373e961d7aebe4c5d8798ccccommit | diff
phy: Update PHY power control sequence

All PHYs should be powered on before register configuration starts. And
only PCIe PHYs need an extra power control before deasserts reset state.

Signed-off-by: Can Guo <cang@codeaurora.org>
Reviewed-by: Manu Gautam <mgautam@codeaurora.org>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/qualcomm/phy-qcom-qmp.c diff | blob | history
John Crispins staging tree