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(parent: c556bcd) | patch
clk: spear3xx: Use proper control register offset
authorThomas Gleixner <tglx@linutronix.de>
Thu, 19 Jun 2014 21:52:23 +0000 (21:52 +0000)
committerMike Turquette <mturquette@linaro.org>
Sun, 13 Jul 2014 14:11:40 +0000 (07:11 -0700)
commit15ebb05248d025534773c9ef64915bd888f04e4b
tree787b460d82493dbd8129865c317b620066395d06tree | snapshot
parentc556bcddc78096caeb46dbe3ad0314dd951f1665commit | diff
clk: spear3xx: Use proper control register offset

The control register is at offset 0x10, not 0x0. This is wreckaged
since commit 5df33a62c (SPEAr: Switch to common clock framework).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/spear/spear3xx_clock.c diff | blob | history
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