git.openwrt.org Git - openwrt/staging/blogic.git/commit

author	harninder rai <harninder.rai@freescale.com>
	Thu, 15 May 2014 07:45:33 +0000 (13:15 +0530)
committer	Scott Wood <scottwood@freescale.com>
	Thu, 22 May 2014 23:08:32 +0000 (18:08 -0500)
commit	1be62c6cced607ee870e45512d021f0d6bd1a6c7
tree	6d45c7e6f224caf5f1c2f7c4e77678478ed1ba4f	tree \| snapshot
parent	fd7e5b7a8758093781a44df9577fe24e9e11723e	commit \| diff

powerpc/mpc85xx: Add BSC9132 QDS Support

- BSC9132 is an integrated device that targets Femto base station market.
  It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies
  with MAPLE-B2F baseband acceleration processing elements

- BSC9132QDS Overview
     2Gbyte DDR3 (on board DDR)
     32Mbyte 16bit NOR flash
     128Mbyte 2K page size NAND Flash
     256 Kbit M24256 I2C EEPROM
     128 Mbit SPI Flash memory
     SD slot
     eTSEC1: Connected to SGMII PHY
     eTSEC2: Connected to SGMII PHY
     DUART interface: supports one UARTs up to 115200 bps for console display

Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>

Documentation/devicetree/bindings/powerpc/fsl/board.txt		diff \| blob \| history
arch/powerpc/boot/dts/bsc9132qds.dts	[new file with mode: 0644]	blob
arch/powerpc/boot/dts/bsc9132qds.dtsi	[new file with mode: 0644]	blob
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi	[new file with mode: 0644]	blob
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi	[new file with mode: 0644]	blob
arch/powerpc/platforms/85xx/Kconfig		diff \| blob \| history
arch/powerpc/platforms/85xx/Makefile		diff \| blob \| history
arch/powerpc/platforms/85xx/bsc913x_qds.c	[new file with mode: 0644]	blob